JPS56277A - Forming method of metal layer pattern - Google Patents

Forming method of metal layer pattern

Info

Publication number
JPS56277A
JPS56277A JP7372679A JP7372679A JPS56277A JP S56277 A JPS56277 A JP S56277A JP 7372679 A JP7372679 A JP 7372679A JP 7372679 A JP7372679 A JP 7372679A JP S56277 A JPS56277 A JP S56277A
Authority
JP
Japan
Prior art keywords
layer
high melting
plasma
pattern
resist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7372679A
Other languages
Japanese (ja)
Inventor
Toshihiko Fukuyama
Shintaro Yanagisawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Original Assignee
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHIYOU LSI GIJUTSU KENKYU KUMIAI, CHO LSI GIJUTSU KENKYU KUMIAI filed Critical CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority to JP7372679A priority Critical patent/JPS56277A/en
Publication of JPS56277A publication Critical patent/JPS56277A/en
Pending legal-status Critical Current

Links

Landscapes

  • ing And Chemical Polishing (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE: To easily form fine patterns of high melting point metals, etc. by a method wherein plasma CVD process is used to form silicon nitride film on a metal layer, the silicon nitride film is patterned by photography etching process, which pattern is used as mask for dry etching.
CONSTITUTION: In pattern forming process of high melting metal or high melting metal silicide layer, for example, thermal oxidation is used to form an SiO2 layer 12 on the surface of an Si substrate 11, then an Mo layer 13 is formed in sputtering device. On the Mo layer 13, Si3N4 layer 14 is formed by plasma CVD method. Then, positive type photo-resist layer 15 is applied and photo-resist pattern is formed, then CF4 plasma is used to dry-etch Si3N4 layer 14 and followed by removing the resist layer 15 by N2 plasma, then the Mo layer 13 is etched by dry etching. In this case, the Si3N4 layer 14 is little etched so that fine patterns are easily formed.
COPYRIGHT: (C)1981,JPO&Japio
JP7372679A 1979-06-12 1979-06-12 Forming method of metal layer pattern Pending JPS56277A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7372679A JPS56277A (en) 1979-06-12 1979-06-12 Forming method of metal layer pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7372679A JPS56277A (en) 1979-06-12 1979-06-12 Forming method of metal layer pattern

Publications (1)

Publication Number Publication Date
JPS56277A true JPS56277A (en) 1981-01-06

Family

ID=13526512

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7372679A Pending JPS56277A (en) 1979-06-12 1979-06-12 Forming method of metal layer pattern

Country Status (1)

Country Link
JP (1) JPS56277A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57172737A (en) * 1981-04-17 1982-10-23 Oki Electric Ind Co Ltd Forming method of throughhole
US4414057A (en) * 1982-12-03 1983-11-08 Inmos Corporation Anisotropic silicide etching process
JPS61138097U (en) * 1985-02-15 1986-08-27
KR100505570B1 (en) * 1997-12-17 2005-10-21 삼성전자주식회사 Method for processing the surface of a material layer in a manufacturing process of a semiconductor device and method for forming a material layer using the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57172737A (en) * 1981-04-17 1982-10-23 Oki Electric Ind Co Ltd Forming method of throughhole
US4414057A (en) * 1982-12-03 1983-11-08 Inmos Corporation Anisotropic silicide etching process
JPS61138097U (en) * 1985-02-15 1986-08-27
KR100505570B1 (en) * 1997-12-17 2005-10-21 삼성전자주식회사 Method for processing the surface of a material layer in a manufacturing process of a semiconductor device and method for forming a material layer using the same

Similar Documents

Publication Publication Date Title
JPS5620165A (en) Formation of pattern
JPS5656636A (en) Processing method of fine pattern
JPS56277A (en) Forming method of metal layer pattern
JPS57130431A (en) Manufacture of semiconductor device
JPS6227384B2 (en)
JPS643663A (en) Forming method for fine pattern
JPS54105476A (en) Manufacture of semiconductor device
JPS55157739A (en) X-ray exposure mask
JPS54107277A (en) Production of semiconductor device
JPS5519873A (en) Forming method of metallic layer pattern for semiconductor
JPS6450531A (en) Formation of fine pattern
JPS56138941A (en) Forming method of wiring layer
KR940005279B1 (en) Manufacturing method of mask for x-ray
JPS6446932A (en) Manufacture of semiconductor device
JPS5693331A (en) Manufacture of semiconductor device
JPS5380167A (en) Manufacture of semiconductor device
JPS54116882A (en) Manufacture of semiconductor device
JPS5478983A (en) Manufacture for electron beam adjusting tool
JPS5635774A (en) Dry etching method
KR19980026093A (en) Method of forming fine pattern of semiconductor device
JPS55111139A (en) Forming method of thin film for fine pattern
JPS5591126A (en) Production of semiconductor device
JPS55130140A (en) Fabricating method of semiconductor device
JPS5522833A (en) Manufacturing of semiconductor device
JPS55153329A (en) Manufacture of semiconductor device