JPS5651827A - Preparation of semiconductor device - Google Patents

Preparation of semiconductor device

Info

Publication number
JPS5651827A
JPS5651827A JP12854279A JP12854279A JPS5651827A JP S5651827 A JPS5651827 A JP S5651827A JP 12854279 A JP12854279 A JP 12854279A JP 12854279 A JP12854279 A JP 12854279A JP S5651827 A JPS5651827 A JP S5651827A
Authority
JP
Japan
Prior art keywords
pattern
resist
metal wiring
layer
composing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12854279A
Other languages
Japanese (ja)
Inventor
Junichi Hoshi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP12854279A priority Critical patent/JPS5651827A/en
Publication of JPS5651827A publication Critical patent/JPS5651827A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PURPOSE:To permit the alignment accuracy needed for two or more photolithographic processes to be reduced by using the pattern portion formed by composing two patterns crossing each other as a pattern for a photolithographic process. CONSTITUTION:Resist 4 as the first layer is applied, and a pattern 5 for metal wiring is formed on a diffused layer 6. Then resist 7 as the second layer is applied, and a pattern 8 crossing the pattern 5 is formed. A pattern portion 9 formed by composing the patterns 5 and 8 is used as a pattern for contact hole. This eliminates the need for the accuracy of the alignment vertical to the metal wiring as well as the need for allowance on the pattern. Then a film 10 under the pattern portion 9 is etched to make a contact hole. The resit 7 is removed, and a metal wiring 11 is formed by the lift-off method using the resist 4.
JP12854279A 1979-10-05 1979-10-05 Preparation of semiconductor device Pending JPS5651827A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12854279A JPS5651827A (en) 1979-10-05 1979-10-05 Preparation of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12854279A JPS5651827A (en) 1979-10-05 1979-10-05 Preparation of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5651827A true JPS5651827A (en) 1981-05-09

Family

ID=14987326

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12854279A Pending JPS5651827A (en) 1979-10-05 1979-10-05 Preparation of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5651827A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58101427A (en) * 1981-12-11 1983-06-16 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
JPH0282626A (en) * 1988-08-22 1990-03-23 Internatl Business Mach Corp <Ibm> Mutual connection method for semiconductor device
JPH04332114A (en) * 1990-09-17 1992-11-19 Hyundai Electron Ind Co Ltd Method of forming mask pattern of semiconductor device
KR100384805B1 (en) * 1999-09-10 2003-05-22 가부시끼가이샤 도시바 Semiconductor device, design method and recording media storing design program of the same
JP2006100781A (en) * 2004-09-06 2006-04-13 Tdk Corp Electronic device and its production method

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51108778A (en) * 1975-03-20 1976-09-27 Fujitsu Ltd Handotaisochino seizohoho

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51108778A (en) * 1975-03-20 1976-09-27 Fujitsu Ltd Handotaisochino seizohoho

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58101427A (en) * 1981-12-11 1983-06-16 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
JPH0282626A (en) * 1988-08-22 1990-03-23 Internatl Business Mach Corp <Ibm> Mutual connection method for semiconductor device
JPH04332114A (en) * 1990-09-17 1992-11-19 Hyundai Electron Ind Co Ltd Method of forming mask pattern of semiconductor device
KR100384805B1 (en) * 1999-09-10 2003-05-22 가부시끼가이샤 도시바 Semiconductor device, design method and recording media storing design program of the same
JP2006100781A (en) * 2004-09-06 2006-04-13 Tdk Corp Electronic device and its production method
JP4670495B2 (en) * 2004-09-06 2011-04-13 Ｔｄｋ株式会社 Electronic device and manufacturing method thereof

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