JPS5555559A - Method of fabricating semiconductor device - Google Patents
Method of fabricating semiconductor deviceInfo
- Publication number
- JPS5555559A JPS5555559A JP12783478A JP12783478A JPS5555559A JP S5555559 A JPS5555559 A JP S5555559A JP 12783478 A JP12783478 A JP 12783478A JP 12783478 A JP12783478 A JP 12783478A JP S5555559 A JPS5555559 A JP S5555559A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- semiconductor device
- region
- emitter
- coated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title abstract 4
- 238000004519 manufacturing process Methods 0.000 title 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 238000009792 diffusion process Methods 0.000 abstract 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 abstract 1
- 229910052581 Si3N4 Inorganic materials 0.000 abstract 1
- 230000002378 acidificating effect Effects 0.000 abstract 1
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 229910052698 phosphorus Inorganic materials 0.000 abstract 1
- 239000011574 phosphorus Substances 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/082—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
- H01L27/0823—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only including vertical bipolar transistors only
- H01L27/0825—Combination of vertical direct transistors of the same conductivity type having different characteristics,(e.g. Darlington transistors)
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/914—Doping
- Y10S438/92—Controlling diffusion profile by oxidation
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Manufacturing & Machinery (AREA)
- Bipolar Transistors (AREA)
- Bipolar Integrated Circuits (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12783478A JPS5555559A (en) | 1978-10-19 | 1978-10-19 | Method of fabricating semiconductor device |
US06/084,302 US4261765A (en) | 1978-10-19 | 1979-10-12 | Method of manufacturing a semiconductor device |
GB7935995A GB2033660B (en) | 1978-10-19 | 1979-10-17 | Manufacturing transistors having different characteristics |
DE2942236A DE2942236C2 (de) | 1978-10-19 | 1979-10-18 | Verfahren zur Herstellung einer Halbleiteranordnung |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12783478A JPS5555559A (en) | 1978-10-19 | 1978-10-19 | Method of fabricating semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5555559A true JPS5555559A (en) | 1980-04-23 |
JPS6157712B2 JPS6157712B2 (ja) | 1986-12-08 |
Family
ID=14969805
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12783478A Granted JPS5555559A (en) | 1978-10-19 | 1978-10-19 | Method of fabricating semiconductor device |
Country Status (4)
Country | Link |
---|---|
US (1) | US4261765A (ja) |
JP (1) | JPS5555559A (ja) |
DE (1) | DE2942236C2 (ja) |
GB (1) | GB2033660B (ja) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5933860A (ja) * | 1982-08-19 | 1984-02-23 | Toshiba Corp | 半導体装置およびその製造方法 |
US4499653A (en) * | 1983-11-03 | 1985-02-19 | Westinghouse Electric Corp. | Small dimension field effect transistor using phosphorous doped silicon glass reflow process |
JPS60117765A (ja) * | 1983-11-30 | 1985-06-25 | Fujitsu Ltd | 半導体装置の製造方法 |
US4939104A (en) * | 1984-10-31 | 1990-07-03 | Texas Instruments, Incorporated | Method for forming a buried lateral contact |
EP0768714B1 (en) * | 1995-10-09 | 2003-09-17 | Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno - CoRiMMe | Construction method for power devices with deep edge ring |
EP0772241B1 (en) | 1995-10-30 | 2004-06-09 | STMicroelectronics S.r.l. | High density MOS technology power device |
DE69534919T2 (de) | 1995-10-30 | 2007-01-25 | Stmicroelectronics S.R.L., Agrate Brianza | Leistungsvorrichtung in MOS-Technologie mit einer einzigen kritischen Größe |
EP0961325B1 (en) | 1998-05-26 | 2008-05-07 | STMicroelectronics S.r.l. | High integration density MOS technology power device |
US6437421B1 (en) * | 1999-12-03 | 2002-08-20 | Legerity, Inc. | Self-aligned dual-base semiconductor process and structure incorporating multiple bipolar device types |
US6372595B1 (en) | 1999-12-03 | 2002-04-16 | Legerity, Inc. | Lateral bipolar junction transistor with reduced parasitic current loss |
FR3100434B1 (fr) * | 2019-09-11 | 2023-10-27 | Oreal | Applicateur pour le maquillage des fibres kératiniques humaines, notamment des sourcils |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS502477A (ja) * | 1973-05-07 | 1975-01-11 | ||
JPS5216186A (en) * | 1975-07-30 | 1977-02-07 | Hitachi Ltd | Producing method of semiconductor device |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3566218A (en) * | 1968-10-02 | 1971-02-23 | Nat Semiconductor Corp The | Multiple base width integrated circuit |
US3992232A (en) * | 1973-08-06 | 1976-11-16 | Hitachi, Ltd. | Method of manufacturing semiconductor device having oxide isolation structure and guard ring |
JPS5214594B2 (ja) * | 1973-10-17 | 1977-04-22 | ||
US3883889A (en) * | 1974-04-15 | 1975-05-13 | Micro Power Systems Inc | Silicon-oxygen-nitrogen layers for semiconductor devices |
US4030952A (en) * | 1974-04-18 | 1977-06-21 | Fairchild Camera And Instrument Corporation | Method of MOS circuit fabrication |
DE2453134C3 (de) * | 1974-11-08 | 1983-02-10 | Deutsche Itt Industries Gmbh, 7800 Freiburg | Planardiffusionsverfahren |
JPS5922380B2 (ja) * | 1975-12-03 | 1984-05-26 | 株式会社東芝 | ハンドウタイソシノ セイゾウホウホウ |
JPS5269587A (en) * | 1975-12-08 | 1977-06-09 | Hitachi Ltd | Device and manufacture for high voltage resisting semiconductor |
NL7604986A (nl) * | 1976-05-11 | 1977-11-15 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleider- inrichting, en inrichting vervaardigd door toe- passing van de werkwijze. |
US4110125A (en) * | 1977-03-03 | 1978-08-29 | International Business Machines Corporation | Method for fabricating semiconductor devices |
-
1978
- 1978-10-19 JP JP12783478A patent/JPS5555559A/ja active Granted
-
1979
- 1979-10-12 US US06/084,302 patent/US4261765A/en not_active Expired - Lifetime
- 1979-10-17 GB GB7935995A patent/GB2033660B/en not_active Expired
- 1979-10-18 DE DE2942236A patent/DE2942236C2/de not_active Expired
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS502477A (ja) * | 1973-05-07 | 1975-01-11 | ||
JPS5216186A (en) * | 1975-07-30 | 1977-02-07 | Hitachi Ltd | Producing method of semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
DE2942236A1 (de) | 1980-04-24 |
US4261765A (en) | 1981-04-14 |
DE2942236C2 (de) | 1984-10-18 |
GB2033660A (en) | 1980-05-21 |
JPS6157712B2 (ja) | 1986-12-08 |
GB2033660B (en) | 1983-01-19 |
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