JPS55138840A - Method of fabricating semiconductor device - Google Patents

Method of fabricating semiconductor device

Info

Publication number
JPS55138840A
JPS55138840A JP4685679A JP4685679A JPS55138840A JP S55138840 A JPS55138840 A JP S55138840A JP 4685679 A JP4685679 A JP 4685679A JP 4685679 A JP4685679 A JP 4685679A JP S55138840 A JPS55138840 A JP S55138840A
Authority
JP
Japan
Prior art keywords
substrate
impurity region
semiconductor
regions
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4685679A
Other languages
Japanese (ja)
Inventor
Keiji Watanabe
Seiya Yugami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kyushu Ltd
Original Assignee
NEC Kyushu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd
Priority to JP4685679A priority Critical patent/JPS55138840A/en
Publication of JPS55138840A publication Critical patent/JPS55138840A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PURPOSE:To improve the superimposing accuracy of layers in a photoetching technology in a method of fabricating a semiconductor device by extending an oxide region in higher than 500Angstrom of depth into an impurity region selectively formed on the main surface of a semiconductor substrate, thereby increasing the stepwise difference between the surface of the substrate and the surface of the impurity region. CONSTITUTION:An insulating layer 2 is formed on a semiconductor substrate 1 and an impurity element is diffused through openings perforated selectively in the layer 2 in the substrate 1 to form source and drain regions 3 in the substrate 1. Then, the substrate 1 is heated for long time in acidic atmosphere to increase the thermal oxide film 2' on the regions 3 so as to set the surface density of the regions 3 to predetermined value and to also extend the surface density in required depth to form a desired impurity region 3'. After the layer 2' is thereafter removed, an insulating layer 2'' of predetermined thickness is uniformly formed on the surface of the semiconductor newly.
JP4685679A 1979-04-17 1979-04-17 Method of fabricating semiconductor device Pending JPS55138840A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4685679A JPS55138840A (en) 1979-04-17 1979-04-17 Method of fabricating semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4685679A JPS55138840A (en) 1979-04-17 1979-04-17 Method of fabricating semiconductor device

Publications (1)

Publication Number Publication Date
JPS55138840A true JPS55138840A (en) 1980-10-30

Family

ID=12758972

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4685679A Pending JPS55138840A (en) 1979-04-17 1979-04-17 Method of fabricating semiconductor device

Country Status (1)

Country Link
JP (1) JPS55138840A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5072586A (en) * 1973-10-27 1975-06-16
JPS5087283A (en) * 1973-12-03 1975-07-14
JPS50161167A (en) * 1974-06-17 1975-12-26

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5072586A (en) * 1973-10-27 1975-06-16
JPS5087283A (en) * 1973-12-03 1975-07-14
JPS50161167A (en) * 1974-06-17 1975-12-26

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