JPS5263684A - Non-volatile semiconductor memory device - Google Patents

Non-volatile semiconductor memory device

Info

Publication number
JPS5263684A
JPS5263684A JP50139589A JP13958975A JPS5263684A JP S5263684 A JPS5263684 A JP S5263684A JP 50139589 A JP50139589 A JP 50139589A JP 13958975 A JP13958975 A JP 13958975A JP S5263684 A JPS5263684 A JP S5263684A
Authority
JP
Japan
Prior art keywords
memory device
gate
semiconductor memory
volatile semiconductor
insulating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP50139589A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5528555B2 (enrdf_load_stackoverflow
Inventor
Hisakazu Iizuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP50139589A priority Critical patent/JPS5263684A/ja
Publication of JPS5263684A publication Critical patent/JPS5263684A/ja
Publication of JPS5528555B2 publication Critical patent/JPS5528555B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels

Landscapes

  • Non-Volatile Memory (AREA)
JP50139589A 1975-11-20 1975-11-20 Non-volatile semiconductor memory device Granted JPS5263684A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50139589A JPS5263684A (en) 1975-11-20 1975-11-20 Non-volatile semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50139589A JPS5263684A (en) 1975-11-20 1975-11-20 Non-volatile semiconductor memory device

Publications (2)

Publication Number Publication Date
JPS5263684A true JPS5263684A (en) 1977-05-26
JPS5528555B2 JPS5528555B2 (enrdf_load_stackoverflow) 1980-07-29

Family

ID=15248775

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50139589A Granted JPS5263684A (en) 1975-11-20 1975-11-20 Non-volatile semiconductor memory device

Country Status (1)

Country Link
JP (1) JPS5263684A (enrdf_load_stackoverflow)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2572211A1 (fr) * 1984-10-23 1986-04-25 Sgs Microelettronica Spa Cellule de memoire permanente du type " merged " (fusionne) a grille flottante superposee a la grille de commande et de selection
JPS6266681A (ja) * 1985-09-19 1987-03-26 Fujitsu Ltd 半導体メモリセルおよびその製造方法
US4795719A (en) * 1984-05-15 1989-01-03 Waferscale Integration, Inc. Self-aligned split gate eprom process
US4868629A (en) * 1984-05-15 1989-09-19 Waferscale Integration, Inc. Self-aligned split gate EPROM
US5021847A (en) * 1984-05-15 1991-06-04 Waferscale Integration, Inc. Split gate memory array having staggered floating gate rows and method for making same
US5293328A (en) * 1992-01-15 1994-03-08 National Semiconductor Corporation Electrically reprogrammable EPROM cell with merged transistor and optiumum area
JPH0964208A (ja) * 1995-08-25 1997-03-07 Nec Corp 不揮発性半導体記憶装置およびその製造方法

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4795719A (en) * 1984-05-15 1989-01-03 Waferscale Integration, Inc. Self-aligned split gate eprom process
US4868629A (en) * 1984-05-15 1989-09-19 Waferscale Integration, Inc. Self-aligned split gate EPROM
US5021847A (en) * 1984-05-15 1991-06-04 Waferscale Integration, Inc. Split gate memory array having staggered floating gate rows and method for making same
FR2572211A1 (fr) * 1984-10-23 1986-04-25 Sgs Microelettronica Spa Cellule de memoire permanente du type " merged " (fusionne) a grille flottante superposee a la grille de commande et de selection
JPS6266681A (ja) * 1985-09-19 1987-03-26 Fujitsu Ltd 半導体メモリセルおよびその製造方法
US5293328A (en) * 1992-01-15 1994-03-08 National Semiconductor Corporation Electrically reprogrammable EPROM cell with merged transistor and optiumum area
JPH0964208A (ja) * 1995-08-25 1997-03-07 Nec Corp 不揮発性半導体記憶装置およびその製造方法

Also Published As

Publication number Publication date
JPS5528555B2 (enrdf_load_stackoverflow) 1980-07-29

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