JPS5236476A - Non-volatile semiconductor memory - Google Patents

Non-volatile semiconductor memory

Info

Publication number
JPS5236476A
JPS5236476A JP11304275A JP11304275A JPS5236476A JP S5236476 A JPS5236476 A JP S5236476A JP 11304275 A JP11304275 A JP 11304275A JP 11304275 A JP11304275 A JP 11304275A JP S5236476 A JPS5236476 A JP S5236476A
Authority
JP
Japan
Prior art keywords
semiconductor memory
volatile semiconductor
insulating film
read operation
control gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11304275A
Other languages
Japanese (ja)
Other versions
JPS5634107B2 (en
Inventor
Yasuki Rai
Terutoshi Sasami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP11304275A priority Critical patent/JPS5236476A/en
Publication of JPS5236476A publication Critical patent/JPS5236476A/en
Publication of JPS5634107B2 publication Critical patent/JPS5634107B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881Programmable transistors with only two possible levels of programmation

Abstract

PURPOSE:To provide a step on the secondary insulating film and form a control gate on it, thereby permitting write and read operation to be performed extremely easily.
JP11304275A 1975-09-17 1975-09-17 Non-volatile semiconductor memory Granted JPS5236476A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11304275A JPS5236476A (en) 1975-09-17 1975-09-17 Non-volatile semiconductor memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11304275A JPS5236476A (en) 1975-09-17 1975-09-17 Non-volatile semiconductor memory

Publications (2)

Publication Number Publication Date
JPS5236476A true JPS5236476A (en) 1977-03-19
JPS5634107B2 JPS5634107B2 (en) 1981-08-07

Family

ID=14602000

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11304275A Granted JPS5236476A (en) 1975-09-17 1975-09-17 Non-volatile semiconductor memory

Country Status (1)

Country Link
JP (1) JPS5236476A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57180181A (en) * 1981-04-30 1982-11-06 Nec Corp Mos type semiconductor device and manufacturing method therefor
US5739568A (en) * 1994-11-28 1998-04-14 Motorola, Inc. Non-volatile memory having a cell applying to multi-bit data by double layered floating gate architecture and programming method for the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57180181A (en) * 1981-04-30 1982-11-06 Nec Corp Mos type semiconductor device and manufacturing method therefor
US5739568A (en) * 1994-11-28 1998-04-14 Motorola, Inc. Non-volatile memory having a cell applying to multi-bit data by double layered floating gate architecture and programming method for the same

Also Published As

Publication number Publication date
JPS5634107B2 (en) 1981-08-07

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