JPS5528555B2 - - Google Patents
Info
- Publication number
- JPS5528555B2 JPS5528555B2 JP13958975A JP13958975A JPS5528555B2 JP S5528555 B2 JPS5528555 B2 JP S5528555B2 JP 13958975 A JP13958975 A JP 13958975A JP 13958975 A JP13958975 A JP 13958975A JP S5528555 B2 JPS5528555 B2 JP S5528555B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/68—Floating-gate IGFETs
- H10D30/681—Floating-gate IGFETs having only two programming levels
Landscapes
- Non-Volatile Memory (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP50139589A JPS5263684A (en) | 1975-11-20 | 1975-11-20 | Non-volatile semiconductor memory device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP50139589A JPS5263684A (en) | 1975-11-20 | 1975-11-20 | Non-volatile semiconductor memory device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5263684A JPS5263684A (en) | 1977-05-26 |
| JPS5528555B2 true JPS5528555B2 (enrdf_load_stackoverflow) | 1980-07-29 |
Family
ID=15248775
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP50139589A Granted JPS5263684A (en) | 1975-11-20 | 1975-11-20 | Non-volatile semiconductor memory device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5263684A (enrdf_load_stackoverflow) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4639893A (en) * | 1984-05-15 | 1987-01-27 | Wafer Scale Integration, Inc. | Self-aligned split gate EPROM |
| US4795719A (en) * | 1984-05-15 | 1989-01-03 | Waferscale Integration, Inc. | Self-aligned split gate eprom process |
| US4868629A (en) * | 1984-05-15 | 1989-09-19 | Waferscale Integration, Inc. | Self-aligned split gate EPROM |
| IT1213229B (it) * | 1984-10-23 | 1989-12-14 | Ates Componenti Elettron | Cella di memoria non volatile di tipo merged con gate flottante sovrapposta alla gate di controllo e selezione. |
| JPS6266681A (ja) * | 1985-09-19 | 1987-03-26 | Fujitsu Ltd | 半導体メモリセルおよびその製造方法 |
| US5293328A (en) * | 1992-01-15 | 1994-03-08 | National Semiconductor Corporation | Electrically reprogrammable EPROM cell with merged transistor and optiumum area |
| JP2950212B2 (ja) * | 1995-08-25 | 1999-09-20 | 日本電気株式会社 | 不揮発性半導体記憶装置およびその製造方法 |
-
1975
- 1975-11-20 JP JP50139589A patent/JPS5263684A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5263684A (en) | 1977-05-26 |