JPH1145949A - スタティック型半導体記憶装置およびその製造方法 - Google Patents

スタティック型半導体記憶装置およびその製造方法

Info

Publication number
JPH1145949A
JPH1145949A JP9201363A JP20136397A JPH1145949A JP H1145949 A JPH1145949 A JP H1145949A JP 9201363 A JP9201363 A JP 9201363A JP 20136397 A JP20136397 A JP 20136397A JP H1145949 A JPH1145949 A JP H1145949A
Authority
JP
Japan
Prior art keywords
impurity diffusion
gate
transistor
conductivity type
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9201363A
Other languages
English (en)
Japanese (ja)
Other versions
JPH1145949A5 (https=
Inventor
Tomohisa Wada
知久 和田
Sachitada Kuriyama
祐忠 栗山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP9201363A priority Critical patent/JPH1145949A/ja
Priority to US09/010,473 priority patent/US5886388A/en
Publication of JPH1145949A publication Critical patent/JPH1145949A/ja
Publication of JPH1145949A5 publication Critical patent/JPH1145949A5/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B10/00Static random access memory [SRAM] devices
    • H10B10/12Static random access memory [SRAM] devices comprising a MOSFET load element
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/903FET configuration adapted for use as static memory cell

Landscapes

  • Semiconductor Memories (AREA)
  • Thin Film Transistor (AREA)
JP9201363A 1997-07-28 1997-07-28 スタティック型半導体記憶装置およびその製造方法 Pending JPH1145949A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP9201363A JPH1145949A (ja) 1997-07-28 1997-07-28 スタティック型半導体記憶装置およびその製造方法
US09/010,473 US5886388A (en) 1997-07-28 1998-01-21 Static semiconductor memory device and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9201363A JPH1145949A (ja) 1997-07-28 1997-07-28 スタティック型半導体記憶装置およびその製造方法

Publications (2)

Publication Number Publication Date
JPH1145949A true JPH1145949A (ja) 1999-02-16
JPH1145949A5 JPH1145949A5 (https=) 2005-05-19

Family

ID=16439822

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9201363A Pending JPH1145949A (ja) 1997-07-28 1997-07-28 スタティック型半導体記憶装置およびその製造方法

Country Status (2)

Country Link
US (1) US5886388A (https=)
JP (1) JPH1145949A (https=)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001077213A (ja) * 1999-09-08 2001-03-23 Mitsubishi Electric Corp スタティック型半導体記憶装置および半導体装置
JP2004104128A (ja) * 2002-09-04 2004-04-02 Samsung Electronics Co Ltd Soi基板に形成されるsramデバイス
JP2006049784A (ja) * 2003-08-28 2006-02-16 Renesas Technology Corp 半導体記憶装置及びその製造方法
JP2007533122A (ja) * 2004-04-01 2007-11-15 ソワジック 改良されたレイアウトのsramメモリセル
JP2008016480A (ja) * 2006-07-03 2008-01-24 Sony Corp 半導体記憶装置及びその製造方法
JP2011166130A (ja) * 2010-01-15 2011-08-25 Semiconductor Energy Lab Co Ltd 半導体装置
JP2018032883A (ja) * 1999-05-12 2018-03-01 ルネサスエレクトロニクス株式会社 半導体集積回路装置

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6239491B1 (en) * 1998-05-18 2001-05-29 Lsi Logic Corporation Integrated circuit structure with thin dielectric between at least local interconnect level and first metal interconnect level, and process for making same
JP3645137B2 (ja) * 1999-10-18 2005-05-11 Necエレクトロニクス株式会社 半導体記憶装置
JP4471504B2 (ja) * 2001-01-16 2010-06-02 株式会社ルネサステクノロジ 半導体記憶装置
US6589823B1 (en) 2001-02-22 2003-07-08 Advanced Micro Devices, Inc. Silicon-on-insulator (SOI)electrostatic discharge (ESD) protection device with backside contact plug
JP2002373946A (ja) * 2001-06-13 2002-12-26 Mitsubishi Electric Corp スタティック型半導体記憶装置
FR2843481B1 (fr) * 2002-08-08 2005-09-16 Soisic Memoire sur substrat du type silicium sur isolant
US6762464B2 (en) * 2002-09-17 2004-07-13 Intel Corporation N-p butting connections on SOI substrates
JP3684232B2 (ja) * 2003-04-25 2005-08-17 株式会社東芝 半導体装置
US20040222422A1 (en) * 2003-05-08 2004-11-11 Wein-Town Sun CMOS inverter layout
JP5588298B2 (ja) * 2010-10-14 2014-09-10 株式会社東芝 半導体装置
DE112021004182T5 (de) * 2020-08-06 2023-06-29 Sony Semiconductor Solutions Corporation Halbleitervorrichtung und elektronische einrichtung
CN114792727A (zh) * 2021-01-25 2022-07-26 台湾积体电路制造股份有限公司 半导体器件及其使用方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6281055A (ja) * 1985-10-04 1987-04-14 Sony Corp 半導体記憶装置
GB8700347D0 (en) * 1987-01-08 1987-02-11 Inmos Ltd Memory cell
US5194749A (en) * 1987-11-30 1993-03-16 Hitachi, Ltd. Semiconductor integrated circuit device
JP3070099B2 (ja) * 1990-12-13 2000-07-24 ソニー株式会社 スタティックram
JPH04359562A (ja) * 1991-06-06 1992-12-11 Casio Comput Co Ltd 薄膜トランジスタおよびその製造方法
US5206533A (en) * 1991-06-24 1993-04-27 Texas Instruments Incorporated Transistor device with resistive coupling
JPH05174580A (ja) * 1991-12-24 1993-07-13 Sony Corp スタティックランダムアクセスメモリ

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018032883A (ja) * 1999-05-12 2018-03-01 ルネサスエレクトロニクス株式会社 半導体集積回路装置
JP2001077213A (ja) * 1999-09-08 2001-03-23 Mitsubishi Electric Corp スタティック型半導体記憶装置および半導体装置
JP2004104128A (ja) * 2002-09-04 2004-04-02 Samsung Electronics Co Ltd Soi基板に形成されるsramデバイス
JP2006049784A (ja) * 2003-08-28 2006-02-16 Renesas Technology Corp 半導体記憶装置及びその製造方法
JP2007533122A (ja) * 2004-04-01 2007-11-15 ソワジック 改良されたレイアウトのsramメモリセル
JP2008016480A (ja) * 2006-07-03 2008-01-24 Sony Corp 半導体記憶装置及びその製造方法
JP2011166130A (ja) * 2010-01-15 2011-08-25 Semiconductor Energy Lab Co Ltd 半導体装置
US8866233B2 (en) 2010-01-15 2014-10-21 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device

Also Published As

Publication number Publication date
US5886388A (en) 1999-03-23

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