JPH1145949A - スタティック型半導体記憶装置およびその製造方法 - Google Patents
スタティック型半導体記憶装置およびその製造方法Info
- Publication number
- JPH1145949A JPH1145949A JP9201363A JP20136397A JPH1145949A JP H1145949 A JPH1145949 A JP H1145949A JP 9201363 A JP9201363 A JP 9201363A JP 20136397 A JP20136397 A JP 20136397A JP H1145949 A JPH1145949 A JP H1145949A
- Authority
- JP
- Japan
- Prior art keywords
- impurity diffusion
- gate
- transistor
- conductivity type
- region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
- H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
- Y10S257/903—FET configuration adapted for use as static memory cell
Landscapes
- Semiconductor Memories (AREA)
- Thin Film Transistor (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9201363A JPH1145949A (ja) | 1997-07-28 | 1997-07-28 | スタティック型半導体記憶装置およびその製造方法 |
| US09/010,473 US5886388A (en) | 1997-07-28 | 1998-01-21 | Static semiconductor memory device and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9201363A JPH1145949A (ja) | 1997-07-28 | 1997-07-28 | スタティック型半導体記憶装置およびその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH1145949A true JPH1145949A (ja) | 1999-02-16 |
| JPH1145949A5 JPH1145949A5 (https=) | 2005-05-19 |
Family
ID=16439822
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9201363A Pending JPH1145949A (ja) | 1997-07-28 | 1997-07-28 | スタティック型半導体記憶装置およびその製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US5886388A (https=) |
| JP (1) | JPH1145949A (https=) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001077213A (ja) * | 1999-09-08 | 2001-03-23 | Mitsubishi Electric Corp | スタティック型半導体記憶装置および半導体装置 |
| JP2004104128A (ja) * | 2002-09-04 | 2004-04-02 | Samsung Electronics Co Ltd | Soi基板に形成されるsramデバイス |
| JP2006049784A (ja) * | 2003-08-28 | 2006-02-16 | Renesas Technology Corp | 半導体記憶装置及びその製造方法 |
| JP2007533122A (ja) * | 2004-04-01 | 2007-11-15 | ソワジック | 改良されたレイアウトのsramメモリセル |
| JP2008016480A (ja) * | 2006-07-03 | 2008-01-24 | Sony Corp | 半導体記憶装置及びその製造方法 |
| JP2011166130A (ja) * | 2010-01-15 | 2011-08-25 | Semiconductor Energy Lab Co Ltd | 半導体装置 |
| JP2018032883A (ja) * | 1999-05-12 | 2018-03-01 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置 |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6239491B1 (en) * | 1998-05-18 | 2001-05-29 | Lsi Logic Corporation | Integrated circuit structure with thin dielectric between at least local interconnect level and first metal interconnect level, and process for making same |
| JP3645137B2 (ja) * | 1999-10-18 | 2005-05-11 | Necエレクトロニクス株式会社 | 半導体記憶装置 |
| JP4471504B2 (ja) * | 2001-01-16 | 2010-06-02 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
| US6589823B1 (en) | 2001-02-22 | 2003-07-08 | Advanced Micro Devices, Inc. | Silicon-on-insulator (SOI)electrostatic discharge (ESD) protection device with backside contact plug |
| JP2002373946A (ja) * | 2001-06-13 | 2002-12-26 | Mitsubishi Electric Corp | スタティック型半導体記憶装置 |
| FR2843481B1 (fr) * | 2002-08-08 | 2005-09-16 | Soisic | Memoire sur substrat du type silicium sur isolant |
| US6762464B2 (en) * | 2002-09-17 | 2004-07-13 | Intel Corporation | N-p butting connections on SOI substrates |
| JP3684232B2 (ja) * | 2003-04-25 | 2005-08-17 | 株式会社東芝 | 半導体装置 |
| US20040222422A1 (en) * | 2003-05-08 | 2004-11-11 | Wein-Town Sun | CMOS inverter layout |
| JP5588298B2 (ja) * | 2010-10-14 | 2014-09-10 | 株式会社東芝 | 半導体装置 |
| DE112021004182T5 (de) * | 2020-08-06 | 2023-06-29 | Sony Semiconductor Solutions Corporation | Halbleitervorrichtung und elektronische einrichtung |
| CN114792727A (zh) * | 2021-01-25 | 2022-07-26 | 台湾积体电路制造股份有限公司 | 半导体器件及其使用方法 |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6281055A (ja) * | 1985-10-04 | 1987-04-14 | Sony Corp | 半導体記憶装置 |
| GB8700347D0 (en) * | 1987-01-08 | 1987-02-11 | Inmos Ltd | Memory cell |
| US5194749A (en) * | 1987-11-30 | 1993-03-16 | Hitachi, Ltd. | Semiconductor integrated circuit device |
| JP3070099B2 (ja) * | 1990-12-13 | 2000-07-24 | ソニー株式会社 | スタティックram |
| JPH04359562A (ja) * | 1991-06-06 | 1992-12-11 | Casio Comput Co Ltd | 薄膜トランジスタおよびその製造方法 |
| US5206533A (en) * | 1991-06-24 | 1993-04-27 | Texas Instruments Incorporated | Transistor device with resistive coupling |
| JPH05174580A (ja) * | 1991-12-24 | 1993-07-13 | Sony Corp | スタティックランダムアクセスメモリ |
-
1997
- 1997-07-28 JP JP9201363A patent/JPH1145949A/ja active Pending
-
1998
- 1998-01-21 US US09/010,473 patent/US5886388A/en not_active Expired - Fee Related
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2018032883A (ja) * | 1999-05-12 | 2018-03-01 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置 |
| JP2001077213A (ja) * | 1999-09-08 | 2001-03-23 | Mitsubishi Electric Corp | スタティック型半導体記憶装置および半導体装置 |
| JP2004104128A (ja) * | 2002-09-04 | 2004-04-02 | Samsung Electronics Co Ltd | Soi基板に形成されるsramデバイス |
| JP2006049784A (ja) * | 2003-08-28 | 2006-02-16 | Renesas Technology Corp | 半導体記憶装置及びその製造方法 |
| JP2007533122A (ja) * | 2004-04-01 | 2007-11-15 | ソワジック | 改良されたレイアウトのsramメモリセル |
| JP2008016480A (ja) * | 2006-07-03 | 2008-01-24 | Sony Corp | 半導体記憶装置及びその製造方法 |
| JP2011166130A (ja) * | 2010-01-15 | 2011-08-25 | Semiconductor Energy Lab Co Ltd | 半導体装置 |
| US8866233B2 (en) | 2010-01-15 | 2014-10-21 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| US5886388A (en) | 1999-03-23 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH1145949A (ja) | スタティック型半導体記憶装置およびその製造方法 | |
| KR100344488B1 (ko) | 반도체집적회로장치 | |
| US5622887A (en) | Process for fabricating BiCMOS devices including passive devices | |
| KR100333021B1 (ko) | 반도체 장치 및 그 제조방법 | |
| JPH1145949A5 (https=) | ||
| KR100214708B1 (ko) | 저접촉저항을 갖는 반도체장치 및 그의 제조방법 | |
| JP3348868B2 (ja) | 集積回路接続を形成する方法 | |
| US6534864B1 (en) | Semiconductor memory device and method of fabricating the same | |
| JPH11145468A (ja) | 半導体装置およびその製造方法 | |
| JP2000124450A (ja) | 半導体装置 | |
| JP2023036057A (ja) | スタンダードセル構造 | |
| US6124638A (en) | Semiconductor device and a method of manufacturing the same | |
| JPH1074846A (ja) | 半導体装置及びその製造方法 | |
| JP2001196549A (ja) | 半導体装置および半導体装置の製造方法 | |
| JP5155617B2 (ja) | 半導体装置およびその製造方法 | |
| JP2005530347A (ja) | 局所的埋め込み相互接続のための改善された構造および方法 | |
| JP3141825B2 (ja) | 半導体装置の製造方法 | |
| JP3447871B2 (ja) | 配線の形成方法及び半導体素子の形成方法 | |
| JP4417445B2 (ja) | 半導体装置及びその製造方法 | |
| JPH09107038A (ja) | Cmosトランジスターの製造方法 | |
| JP2005236105A (ja) | 半導体装置およびその製造方法 | |
| KR20020096055A (ko) | 각기 다른 반도체층 상에 nmos 트랜지스터 및pmos 트랜지스터를 구비하는 2-입력 노어 게이트 및그 제조 방법 | |
| JP2001217319A (ja) | 半導体集積回路装置およびその製造方法 | |
| JPWO1997005652A1 (ja) | Sram装置およびその製造方法 | |
| JP2001028424A (ja) | 半導体装置とその製造方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20040713 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20040713 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20060927 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20070911 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20080129 |