JPH08306923A - 半導体素子のトランジスター製造方法 - Google Patents

半導体素子のトランジスター製造方法

Info

Publication number
JPH08306923A
JPH08306923A JP8113675A JP11367596A JPH08306923A JP H08306923 A JPH08306923 A JP H08306923A JP 8113675 A JP8113675 A JP 8113675A JP 11367596 A JP11367596 A JP 11367596A JP H08306923 A JPH08306923 A JP H08306923A
Authority
JP
Japan
Prior art keywords
manufacturing
impurity ions
transistor
source
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8113675A
Other languages
English (en)
Japanese (ja)
Inventor
Park Yong-Taek
瑩 澤 朴
Young-Kyun Oh
榮 均 呉
Eui-Sik Kim
義 式 金
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
Original Assignee
Hyundai Electronics Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyundai Electronics Industries Co Ltd filed Critical Hyundai Electronics Industries Co Ltd
Publication of JPH08306923A publication Critical patent/JPH08306923A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66492Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a pocket or a lightly doped drain selectively formed at the side of the gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66575Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823418MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
JP8113675A 1995-05-09 1996-05-08 半導体素子のトランジスター製造方法 Pending JPH08306923A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR95-11225 1995-05-09
KR1019950011225A KR0146525B1 (ko) 1995-05-09 1995-05-09 반도체 소자의 트랜지스터 제조방법

Publications (1)

Publication Number Publication Date
JPH08306923A true JPH08306923A (ja) 1996-11-22

Family

ID=19413930

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8113675A Pending JPH08306923A (ja) 1995-05-09 1996-05-08 半導体素子のトランジスター製造方法

Country Status (4)

Country Link
JP (1) JPH08306923A (ko)
KR (1) KR0146525B1 (ko)
CN (1) CN1050691C (ko)
TW (1) TW371783B (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6667216B2 (en) 1999-05-14 2003-12-23 Matsushita Electronics Corporation Semiconductor device and method of fabricating the same

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100429873B1 (ko) * 2001-07-19 2004-05-04 삼성전자주식회사 모스 트랜지스터 및 그 형성방법
EP1524684B1 (en) * 2003-10-17 2010-01-13 Imec Method for providing a semiconductor substrate with a layer structure of activated dopants
CN102148245B (zh) * 2010-02-10 2016-09-28 上海华虹宏力半导体制造有限公司 本征mos晶体管及其形成方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63155720A (ja) * 1986-12-19 1988-06-28 Nippon Telegr & Teleph Corp <Ntt> 半導体装置の製造方法
JPH04158529A (ja) * 1990-10-23 1992-06-01 Oki Electric Ind Co Ltd 半導体素子の製造方法
JPH05136404A (ja) * 1991-04-22 1993-06-01 Mitsubishi Electric Corp 半導体装置およびその製造方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06302824A (ja) * 1993-02-16 1994-10-28 Sanyo Electric Co Ltd 薄膜トランジスタおよびその製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63155720A (ja) * 1986-12-19 1988-06-28 Nippon Telegr & Teleph Corp <Ntt> 半導体装置の製造方法
JPH04158529A (ja) * 1990-10-23 1992-06-01 Oki Electric Ind Co Ltd 半導体素子の製造方法
JPH05136404A (ja) * 1991-04-22 1993-06-01 Mitsubishi Electric Corp 半導体装置およびその製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6667216B2 (en) 1999-05-14 2003-12-23 Matsushita Electronics Corporation Semiconductor device and method of fabricating the same
US6921933B2 (en) 1999-05-14 2005-07-26 Matsushita Electric Industrial Co., Ltd. Semiconductor device and method of fabricating the same

Also Published As

Publication number Publication date
KR0146525B1 (ko) 1998-11-02
KR960043050A (ko) 1996-12-21
CN1050691C (zh) 2000-03-22
CN1146627A (zh) 1997-04-02
TW371783B (en) 1999-10-11

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