JPH0677823A - 周波数シンセサイザ - Google Patents
周波数シンセサイザInfo
- Publication number
- JPH0677823A JPH0677823A JP4224445A JP22444592A JPH0677823A JP H0677823 A JPH0677823 A JP H0677823A JP 4224445 A JP4224445 A JP 4224445A JP 22444592 A JP22444592 A JP 22444592A JP H0677823 A JPH0677823 A JP H0677823A
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- output
- signal
- voltage controlled
- controlled oscillator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000013078 crystal Substances 0.000 claims description 10
- 230000010355 oscillation Effects 0.000 claims description 9
- 239000004065 semiconductor Substances 0.000 abstract description 10
- 230000005855 radiation Effects 0.000 abstract 2
- 230000008030 elimination Effects 0.000 abstract 1
- 238000003379 elimination reaction Methods 0.000 abstract 1
- 238000006243 chemical reaction Methods 0.000 description 18
- 229940028444 muse Drugs 0.000 description 17
- GMVPRGQOIOIIMI-DWKJAMRDSA-N prostaglandin E1 Chemical compound CCCCC[C@H](O)\C=C\[C@H]1[C@H](O)CC(=O)[C@@H]1CCCCCCC(O)=O GMVPRGQOIOIIMI-DWKJAMRDSA-N 0.000 description 17
- 239000003990 capacitor Substances 0.000 description 10
- 238000010586 diagram Methods 0.000 description 8
- 238000000034 method Methods 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 238000005070 sampling Methods 0.000 description 2
- 230000001360 synchronised effect Effects 0.000 description 2
- 241000053227 Themus Species 0.000 description 1
- 230000002238 attenuated effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000013139 quantization Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
- H03L7/23—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers
- H03L7/235—Nested phase locked loops
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Synchronizing For Television (AREA)
- Television Systems (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4224445A JPH0677823A (ja) | 1992-08-24 | 1992-08-24 | 周波数シンセサイザ |
| EP93306545A EP0585050A2 (en) | 1992-08-24 | 1993-08-19 | Multi-mode frequency synthesiser with reduced jitter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4224445A JPH0677823A (ja) | 1992-08-24 | 1992-08-24 | 周波数シンセサイザ |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0677823A true JPH0677823A (ja) | 1994-03-18 |
Family
ID=16813888
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4224445A Pending JPH0677823A (ja) | 1992-08-24 | 1992-08-24 | 周波数シンセサイザ |
Country Status (2)
| Country | Link |
|---|---|
| EP (1) | EP0585050A2 (cg-RX-API-DMAC10.html) |
| JP (1) | JPH0677823A (cg-RX-API-DMAC10.html) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1998044659A1 (fr) * | 1997-03-28 | 1998-10-08 | Rohm Co., Ltd. | MODULATEUR/DEMODULATEUR INTEGRE IrDA |
| JP2008099097A (ja) * | 2006-10-13 | 2008-04-24 | Mitsubishi Electric Corp | クロック位相シフト装置 |
| JP2009016973A (ja) * | 2007-07-02 | 2009-01-22 | Japan Radio Co Ltd | シンセサイザ |
| WO2010032328A1 (ja) * | 2008-09-22 | 2010-03-25 | パイオニア株式会社 | Pll回路およびこれを用いた膜厚測定器 |
| WO2013022192A3 (ko) * | 2011-08-05 | 2013-04-04 | 주식회사 아이덴코아 | 위상 고정 루프 및 이를 포함하는 클럭 발생 시스템 |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE19734656A1 (de) * | 1997-08-11 | 1999-02-18 | Alsthom Cge Alcatel | Schaltungsanordnung zur Einstellung einer Systemfrequenz |
| WO1999008384A2 (en) * | 1997-08-12 | 1999-02-18 | Koninklijke Philips Electronics N.V. | Multichannel radio device, a radio communication system, and a fractional division frequency synthesizer |
| DE19913110C1 (de) * | 1999-03-23 | 2000-11-16 | Siemens Ag | Frequenzsynthesizer |
| US6198354B1 (en) * | 1999-12-07 | 2001-03-06 | Hughes Electronics Corporation | System for limiting if variation in phase locked loops |
| JP2003152694A (ja) * | 2001-11-14 | 2003-05-23 | Mitsubishi Electric Corp | データ・クロック再生装置 |
| DE102006011682B4 (de) | 2006-03-14 | 2015-04-09 | Intel Mobile Communications GmbH | Transceiver-Schaltungsanordnung |
| US8681917B2 (en) | 2010-03-31 | 2014-03-25 | Andrew Llc | Synchronous transfer of streaming data in a distributed antenna system |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4180783A (en) * | 1977-09-06 | 1979-12-25 | Rca Corporation | Phase lock loop data timing recovery circuit |
| JPS63128816A (ja) * | 1986-11-18 | 1988-06-01 | Toshiba Corp | Pll回路 |
-
1992
- 1992-08-24 JP JP4224445A patent/JPH0677823A/ja active Pending
-
1993
- 1993-08-19 EP EP93306545A patent/EP0585050A2/en not_active Withdrawn
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1998044659A1 (fr) * | 1997-03-28 | 1998-10-08 | Rohm Co., Ltd. | MODULATEUR/DEMODULATEUR INTEGRE IrDA |
| US6526270B1 (en) | 1997-03-28 | 2003-02-25 | Rohm Co., Ltd. | IrDA modulation/demodulation integrated circuit device |
| JP2008099097A (ja) * | 2006-10-13 | 2008-04-24 | Mitsubishi Electric Corp | クロック位相シフト装置 |
| JP2009016973A (ja) * | 2007-07-02 | 2009-01-22 | Japan Radio Co Ltd | シンセサイザ |
| WO2010032328A1 (ja) * | 2008-09-22 | 2010-03-25 | パイオニア株式会社 | Pll回路およびこれを用いた膜厚測定器 |
| JP4773581B2 (ja) * | 2008-09-22 | 2011-09-14 | パイオニア株式会社 | Pll回路を用いた膜厚測定器 |
| US8432151B2 (en) | 2008-09-22 | 2013-04-30 | Pioneer Corporation | Film-thickness measuring device using PLL circuit |
| WO2013022192A3 (ko) * | 2011-08-05 | 2013-04-04 | 주식회사 아이덴코아 | 위상 고정 루프 및 이를 포함하는 클럭 발생 시스템 |
Also Published As
| Publication number | Publication date |
|---|---|
| EP0585050A3 (cg-RX-API-DMAC10.html) | 1994-04-13 |
| EP0585050A2 (en) | 1994-03-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2526558B2 (ja) | ビデオ信号のスキャンコンバ−タ装置 | |
| US4757264A (en) | Sample clock signal generator circuit | |
| JPH09162730A (ja) | Pll回路 | |
| JPH0677823A (ja) | 周波数シンセサイザ | |
| JP3652009B2 (ja) | クロックジェネレータ | |
| JPS62159981A (ja) | ビデオ装置用同期回路 | |
| JP3320576B2 (ja) | 発振回路 | |
| CA2345559C (en) | Horizontal synchronization for digital television receiver | |
| US6420918B2 (en) | Phase control for oscillators | |
| JP3244437B2 (ja) | クロック発生回路および方法 | |
| JPH06291644A (ja) | Pll回路 | |
| JP3209187B2 (ja) | クロック周波数変換回路及びその変換方法並びにクロック周波数変換機能を備えた受像装置 | |
| JP2713988B2 (ja) | 水平afc回路 | |
| JP3511821B2 (ja) | 映像信号処理回路 | |
| JP3304031B2 (ja) | ゲンロック装置 | |
| JP3638443B2 (ja) | ディジタル放送用テレビジョン受信機 | |
| JP3277160B2 (ja) | Pal方式の同期信号発生回路 | |
| JP2661300B2 (ja) | 画像標本化クロックの制御方法 | |
| JP2609936B2 (ja) | Muse/ntscコンバータ | |
| JPH0468669A (ja) | Pll回路 | |
| JPH0635573Y2 (ja) | 倍速テレビの水平回路 | |
| JPH1141623A (ja) | クロック生成回路 | |
| JP2508443B2 (ja) | サンプリングレ−ト変換回路のクロック同期回路 | |
| JP2622759B2 (ja) | Pll回路 | |
| JPS63296569A (ja) | 水平周波数逓倍回路 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 19990810 |