JPH0385755A - 樹脂封止型半導体装置 - Google Patents

樹脂封止型半導体装置

Info

Publication number
JPH0385755A
JPH0385755A JP1223865A JP22386589A JPH0385755A JP H0385755 A JPH0385755 A JP H0385755A JP 1223865 A JP1223865 A JP 1223865A JP 22386589 A JP22386589 A JP 22386589A JP H0385755 A JPH0385755 A JP H0385755A
Authority
JP
Japan
Prior art keywords
connector
electrode
semiconductor device
lead frame
die stage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1223865A
Other languages
English (en)
Other versions
JPH0671062B2 (ja
Inventor
Yoshimasa Kudo
工藤　好正
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP1223865A priority Critical patent/JPH0671062B2/ja
Priority to US07/571,972 priority patent/US5218231A/en
Publication of JPH0385755A publication Critical patent/JPH0385755A/ja
Publication of JPH0671062B2 publication Critical patent/JPH0671062B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/071—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next and on each other, i.e. mixed assemblies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49575—Assemblies of semiconductor devices on lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/41—Structure, shape, material or disposition of the strap connectors after the connecting process of a plurality of strap connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H01L2224/331—Disposition
    • H01L2224/3318—Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/33181—On opposite sides of the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/40137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401—Disposition
    • H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/40247—Connecting the strap to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848—Bonding techniques
    • H01L2224/84801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H01L2924/12036—PN diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Die Bonding (AREA)
  • Rectifiers (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔発明の目的〕 （産業上の利用分野） 本発明は、電源整流用樹脂封止型半導体装置に係わり、
特に、ブリッジ（［３ｒｉｄｇｅ）回路を描或する樹脂
封止型半導体装置に好適する。
（従来の技術） ブリッジ回路を利用する電源整流樹脂封止型半導体装置
には、いわゆるメサ（Ｍｅｓａ）型ダイオード（Ｄｉｏ
ｄｅ）またはブレイナー（Ｐｌａｎｅｒ）型ダイオード
により形成するブリッジ回路を利用しており、その組立
方式は、幾多の変遷を経た上でリードフレーム（Ｌｅａ
ｄ　Ｆｒａｍｅ）を利用する手法も利用されている。こ
の電源整流用樹脂封止型半導体装置を、第１図の斜視図
及びこれをＡ−Ａ線により切断した第２図の断面図更に
、半導体素子の構造を示す第３図断面図により説明する
。即ち、ブリッジ回路を構成する半導体素子として利用
するプレイナ型またはメサ型のダイオードが適用されて
いるが、順序不同であるが第３図断面図に示したブレイ
ナー型について説明する。
ダイオードに必要な、反対の極性を示すＮ及びＰ型の不
純物領域１．２が半導体素子を構成するシリコン半導体
基板（特に図示せず）に形成されており、更にＮ十領域
３も記載されている。このＮ十領域３は、半導体基板内
に多数のプレイナー型半導体素子を形成するのに必要な
分離領域として機能するものであると共に、Ｎ十領域３
に形成するダイシングライン（Ｄｉｃｉｎｇ　Ｌｉｎｅ
図示せず）に沿ってプレイキング（Ｂｒａｋｉｎｇ）処
理して個別の半導体素子を形成する役割も果たす。
図にあるように、Ｐ十領域２とＮ十領域３には、夫々導
電性金属層４．５を被覆して電極層４．５を形成してい
る外に、常法の熱酸化法により熱酸化膜６を被覆後、フ
ォトリソグラフィ（Ｐｈｏｔ。
Ｌｊ　ｔｈｏｇｒａｐｈｙ）法によりパターニング（Ｐ
ａｔｔｅｒｎｊｎｇ）された状態が図示されており、半
導体基板表面に露出する接合端部７．８を被覆している
。
これに対してメサ型半導体素子では、図示していないが
接合端部をメサ状部分に露出しているのが特徴である。
即ち、半導体基板の厚さ方向に正または負ベベル（Ｂｅ
ｖｅｌ）もしくは両方を備えた傾斜面を機械的または化
学的さらには両方を組合わせた手段によって形成する。
そして、上記のようにこの傾斜面に露出したダイオード
に不可欠な接合端部をシリコンゴムなとのエンキャップ
（ｃｎｃａｐｅ）材で被覆・保護するのが通常である。
ところで、このような構造を持ったダイオードの複数個
によりブリッジ回路を構成する電源整流樹脂封止型半導
体装置が市販されているが、その組立工程には、いわゆ
るリードフレームを利用する方式が採用されており、第
１図の斜視図及びこれをＡ−Ａ線で切断した断面図によ
り説明する。
コネクター（Ｃｏｎｎｅｃｔｅｒ）　Ｉ　Ｏは、インナ
ーリード（Ｉｎｎｅｒ　Ｌｅａｄ）　９に半田層１２に
より固着して一体としており、ブリッジ回路に必要な４
個のブレイナーまたはメサ型半導体素子１３・・・を半
田層１２・・・を介してコネクターｌＯに固着する。更
に、このように半導体素子１３・・・を取付けたコネク
ター１０．１０には、リードフレーム１４に形成したダ
イステージ（ＤｉｅＳｔａｇｅ）１５に各半導体素子１
３．１３の裏面電極５．５を半田層１２を介して固着し
て互いに相対向するように取付ける。
次に、公知のトランスファーモールド（Ｔｒａｎｓｆ−
ｅｒ　Ｍｏ１ｄ）法により樹脂封止工程を施して封止樹
脂層１６を被覆して、電源整流樹脂封止型半導体装を完
成している。
（発明が解決しようとする課題） このような構造の樹脂封止型半導体装置にあっては、半
田層１２による取付工程が問題となる。
と言うのは、Ｐ＋側電極４をダイステージ１５に取付け
る際、半田層１２が平坦なダイステージ１５部分に広が
って、絶縁が必要なＮ十領域３、Ｐ領域２部分に接触す
る頻度が大きい。このため短絡不良が起こると共に、半
導体素子に必要な耐圧が取れない。
更に、半田層と半導体素子の接触面積が一定でないため
に応力バランスが崩れるためにしばしば割れる事故が発
生した。
本発明は、このような事情により成されたもので、特に
、半田の拡がりによるＰ＋、Ｎ＋側電極との短絡不良及
び半導体素子を形成する半導体基板と、ダイステージや
コネクター間の接合面積不均一によるクラックを防止す
ることを目的とするものである。
〔発明の構成〕
（課題を解決するための手段） 半導体基板内にＰＮ接合を形成する複数の半導体素子と
、このＰＮ接合を構成する相反する導電型の不純物領域
に夫々形成する電極と、この電極に対応するダイステー
ジの両面に形成するエンボス部と、この両エンボス部と
各電極間に形成する第１固着層と、エンボス部と固着し
ていない各電極とコネクター間に形成する第２固着層と
、このコネクターに接続するリードと、これらを被覆す
る封止樹脂層に本発明に係わる樹脂封止型半導体装置の
特徴がある。
（作　用） このように本発明では、半田層の拡がりをエンボス範囲
に抑制できるので、厚さを従来より大きくして、疲労特
性を改善できる。更に、半導体素子に形成する電極との
半田付面積を一定に維持することができるために、面積
差による応力も防止でき、ひいてはクラック発生も改善
できる。
（実施例） 以下本発明に係わる一実施例を第４図〜第６図を参照し
て説明するが、第４図にブレイナー型ダイオード２０、
第６図にメサ型ダイオード２１の使用例が示されており
、メサ型ダイオードについて先ず説明する。図に明らか
にされていないが、第３図に明らかなようにＮ−型シリ
コン半導体基板表面に常法により被着した熱酸化膜には
、フォトリソグラフィ法によるバターニング工程を施し
て窓を形成後反対導電型の不純物例えばＢを拡散または
イオン注入法により導入してＰ生型領域を設置すると共
に接合を形成するが、メサ型構造の特徴として接合端部
をシリコン半導体基板の厚さ方向に導出する。更に、図
示していないが、シリコン半導体基板の厚さ方向には、
正、負または両者を併用した傾斜ベベル面を形式して接
合端部と交差させて素子の耐圧特性を満足させる。この
傾斜面にはシリコンゴムなどからなる材料をエンキャッ
プ処理して保護するのは勿論である。
傾斜面の角度及び方向は、素子特性即ち求める耐圧と各
領域の不純物濃度により決定されるのでいちがいには決
められない。これに対してブレイナー型ダイオード２０
は、第３図に示した構造通りであるので説明は省略する
。
本発明では、半導体素子であるブレイナー型ダイオード
２０またはメサ型ダイオード２１を、リードフレームに
形成するダイステージ２２と、コネクタ２３の一部を構
成するインナーリード２４に一体に取付けたフォーミン
グリード２５とに半田層即ち第１固着層２６を介して設
置するが、いずれも後述するエンボス（Ｅｍｂｏｓｓ）
部３０ａ　、　３０ｂを形成するのが特徴である。即ち
、第５図に明らかにしたように、銅または銅合金などに
例えばプレス（Ｐｒｅｓｓ）工程を施してＤＩＰ　（Ｄ
ｕａｌ　Ｉｎ　Ｌｉｎｅ　Ｐａｃｋａｇｅ）用リードフ
レーム２８を利用する。リードフレーム２８の材質及び
形状は、これに限定されるものでなく、ＤＩＰまたはＳ
ＩＰ（Ｓｉｎｇｌｅ　Ｉｎ　Ｌｉｎｅ　Ｐａｃｋａｇｅ
）との混合形式や、鉄または鉄・ニッケル合金製でも良
いことは勿論である。このようなリードフレーム２８に
おけるダイステージ２２形成予定位置の外側を塑性加工
して金属材料が移動することによって環状の段差部２７
とその内側に突出したエンボス部３０ａ　、　３０ｂが
形成される（第５図参照、以後突出したダイステージ部
分をダイステージと記載する）。
ところで、電源整流樹脂封止型半導体装置に必要なブリ
ッジ回路用としてブレイナー型ダイオド２０をリードフ
レーム２８とコネクター２５により組立てるが、最小４
個のブレイナー型ダイオード２０でブリッジ回路を形成
する。このために第４図にあるように単一のブレイナー
型ダイオード２０を夫々半田層即ち第２の固着層２６に
より固着したコネクター２５を用意し、これをインナー
リード２３．２３によって一体とする。
このような組立工程を終えてからトランスファモールド
法により樹脂封止層２９を被覆して、電源整流樹脂封止
型半導体装置を完成する。第６図には、メサ型ダイオー
ド２１を４個利用して形成した電源整流樹脂封止型半導
体装置の断面図を示したが、第４図とダイオードの種類
を除いては全く同様なので説明は省略する。なお、完成
した状態は、第１図と同様である。
〔発明の効果〕
以上詳述したように、本発明ではダイステージにダイオ
ードを半田により固着する際、半田の拡がりをエンボス
部の範囲内に抑えられるので、半導体素子であるダイオ
ードのＰ側電極と一体となる半田層が流れてＮ中領域に
達する事故が防止できる。このために、半田層の量を多
くして、半導体素子即ち電源整流樹脂封止型半導体装置
に要求される熱疲労特性を改善することができる。
しかも、半導体基板を利用する半導体素子の両面に形式
した電極に固着する半田層間に形成される変成層範囲を
ほぼ一定に抑制できるので、その差により発生する応力
に起因するクラック（Ｃｒａｃｋ）も防止できる。この
ような利点は、ブレイナー型とメサ型の違いによらず達
成されることを付記しておく。
【図面の簡単な説明】
第１図は、従来の車輌用電源整流樹脂封止型半導体装置
の斜視図、第２図は、第１図をＡ−Ａ線で切断した断面
図、第３図は、ブレイナー型ダイオードの断面図、第４
図乃至第６図は、本発明０ に係わる車輌用電源整流樹脂封止型半導体装置の要部を
示す断面図である。 １〜３・・・不純物領域、 ４．５・・・電極、 ６・・・熱酸化膜、 ７．８・・・接合端部、 ９．１４．２３．２８・・・インナーリード、１０、２
５・・・コネクタ １２．２６・・・第１、第２半田層、 １３．２０．２１・・・半導体素子、 １５．２２・・・ダイステージ、 ２７・・・段差部、 ３０ａ　、　３０ｂ・・・エンボス。

Claims (1)

    【特許請求の範囲】
  1. 半導体基板内にＰＮ接合を形成する複数の半導体素子と
    、このＰＮ接合を構成する相反する導電形の不純物領域
    に夫々形成する電極と、この電極に対応するダイステー
    ジの両面に形成するエンボス部と、この両エンボス部と
    各電極間に形成する第１固着層と、エンボス部と固着し
    ていない各電極とコネクター間に形成する第２固着層と
    、このコネクターに接続するリードと、これらを被覆す
    る封止樹脂層を具備することを特徴とする樹脂封止型半
    導体装置。
JP1223865A 1989-08-30 1989-08-30 樹脂封止型半導体装置 Expired - Lifetime JPH0671062B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP1223865A JPH0671062B2 (ja) 1989-08-30 1989-08-30 樹脂封止型半導体装置
US07/571,972 US5218231A (en) 1989-08-30 1990-08-24 Mold-type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1223865A JPH0671062B2 (ja) 1989-08-30 1989-08-30 樹脂封止型半導体装置

Publications (2)

Publication Number Publication Date
JPH0385755A true JPH0385755A (ja) 1991-04-10
JPH0671062B2 JPH0671062B2 (ja) 1994-09-07

Family

ID=16804920

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1223865A Expired - Lifetime JPH0671062B2 (ja) 1989-08-30 1989-08-30 樹脂封止型半導体装置

Country Status (2)

Country Link
US (1) US5218231A (ja)
JP (1) JPH0671062B2 (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002035613A1 (en) * 2000-10-20 2002-05-02 Josuke Nakata Light-emitting or light-detecting semiconductor module and method of manufacture thereof
DE10303463A1 (de) * 2003-01-29 2004-08-19 Infineon Technologies Ag Halbleiterbauelement mit wenigstens zwei in einem Gehäuse integrierten und durch einen gemeinsamen Kontaktbügel kontakierten Chips
JP2016036047A (ja) * 2015-11-04 2016-03-17 トヨタ自動車株式会社 パワーモジュール

Families Citing this family (139)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2829188B2 (ja) * 1992-04-27 1998-11-25 株式会社東芝 樹脂封止型半導体装置
JPH07230733A (ja) * 1994-02-16 1995-08-29 Shinko Electric Ind Co Ltd 半導体アレスタ
US5512784A (en) * 1994-04-19 1996-04-30 Jerrold Communications, General Instrument Corporation Surge protector semiconductor subassembly for 3-lead transistor aotline package
US5821611A (en) * 1994-11-07 1998-10-13 Rohm Co. Ltd. Semiconductor device and process and leadframe for making the same
US5521124A (en) * 1995-04-04 1996-05-28 Tai; Chao-Chi Method of fabricating plastic transfer molded semiconductor silicone bridge rectifiers with radial terminals
FR2742000B1 (fr) * 1995-11-30 1998-04-24 Sgs Thomson Microelectronics Composant semiconducteur a montage par brasure
KR100192180B1 (ko) * 1996-03-06 1999-06-15 김영환 멀티-레이어 버텀 리드 패키지
US6147410A (en) * 1998-03-02 2000-11-14 Motorola, Inc. Electronic component and method of manufacture
US7005326B1 (en) 1998-06-24 2006-02-28 Amkor Technology, Inc. Method of making an integrated circuit package
US7030474B1 (en) 1998-06-24 2006-04-18 Amkor Technology, Inc. Plastic integrated circuit package and method and leadframe for making the package
US7112474B1 (en) 1998-06-24 2006-09-26 Amkor Technology, Inc. Method of making an integrated circuit package
US6893900B1 (en) 1998-06-24 2005-05-17 Amkor Technology, Inc. Method of making an integrated circuit package
US7332375B1 (en) 1998-06-24 2008-02-19 Amkor Technology, Inc. Method of making an integrated circuit package
US7071541B1 (en) 1998-06-24 2006-07-04 Amkor Technology, Inc. Plastic integrated circuit package and method and leadframe for making the package
US6143981A (en) 1998-06-24 2000-11-07 Amkor Technology, Inc. Plastic integrated circuit package and method and leadframe for making the package
US6040626A (en) * 1998-09-25 2000-03-21 International Rectifier Corp. Semiconductor package
US6396127B1 (en) * 1998-09-25 2002-05-28 International Rectifier Corporation Semiconductor package
JP2000164788A (ja) * 1998-11-20 2000-06-16 Anam Semiconductor Inc 半導体パッケ―ジ用リ―ドフレ―ムとこれを用いた半導体パッケ―ジ及びその製造方法
KR20010037247A (ko) 1999-10-15 2001-05-07 마이클 디. 오브라이언 반도체패키지
KR100526844B1 (ko) * 1999-10-15 2005-11-08 앰코 테크놀로지 코리아 주식회사 반도체패키지 및 그 제조방법
KR100379089B1 (ko) 1999-10-15 2003-04-08 앰코 테크놀로지 코리아 주식회사 리드프레임 및 이를 이용한 반도체패키지
KR100403142B1 (ko) * 1999-10-15 2003-10-30 앰코 테크놀로지 코리아 주식회사 반도체패키지
US6329714B1 (en) * 1999-11-01 2001-12-11 General Semiconductor, Inc. Hybrid S.C. devices and method of manufacture thereof
US6580159B1 (en) 1999-11-05 2003-06-17 Amkor Technology, Inc. Integrated circuit device packages and substrates for making the packages
US20070176287A1 (en) * 1999-11-05 2007-08-02 Crowley Sean T Thin integrated circuit device packages for improved radio frequency performance
US6847103B1 (en) 1999-11-09 2005-01-25 Amkor Technology, Inc. Semiconductor package with exposed die pad and body-locking leadframe
US6459147B1 (en) * 2000-03-27 2002-10-01 Amkor Technology, Inc. Attaching semiconductor dies to substrates with conductive straps
US6521982B1 (en) 2000-06-02 2003-02-18 Amkor Technology, Inc. Packaging high power integrated circuit devices
US6319755B1 (en) 1999-12-01 2001-11-20 Amkor Technology, Inc. Conductive strap attachment process that allows electrical connector between an integrated circuit die and leadframe
KR100421774B1 (ko) 1999-12-16 2004-03-10 앰코 테크놀로지 코리아 주식회사 반도체패키지 및 그 제조 방법
US6639308B1 (en) * 1999-12-16 2003-10-28 Amkor Technology, Inc. Near chip size semiconductor package
KR100583494B1 (ko) * 2000-03-25 2006-05-24 앰코 테크놀로지 코리아 주식회사 반도체패키지
US7042068B2 (en) * 2000-04-27 2006-05-09 Amkor Technology, Inc. Leadframe and semiconductor package made using the leadframe
US6566164B1 (en) 2000-12-07 2003-05-20 Amkor Technology, Inc. Exposed copper strap in a semiconductor package
KR20020058209A (ko) * 2000-12-29 2002-07-12 마이클 디. 오브라이언 반도체패키지
KR100731007B1 (ko) * 2001-01-15 2007-06-22 앰코 테크놀로지 코리아 주식회사 적층형 반도체 패키지
US6545345B1 (en) 2001-03-20 2003-04-08 Amkor Technology, Inc. Mounting for a package containing a chip
US6967395B1 (en) 2001-03-20 2005-11-22 Amkor Technology, Inc. Mounting for a package containing a chip
KR100393448B1 (ko) 2001-03-27 2003-08-02 앰코 테크놀로지 코리아 주식회사 반도체 패키지 및 그 제조 방법
KR100369393B1 (ko) 2001-03-27 2003-02-05 앰코 테크놀로지 코리아 주식회사 리드프레임 및 이를 이용한 반도체패키지와 그 제조 방법
US6597059B1 (en) 2001-04-04 2003-07-22 Amkor Technology, Inc. Thermally enhanced chip scale lead on chip semiconductor package
US7045883B1 (en) 2001-04-04 2006-05-16 Amkor Technology, Inc. Thermally enhanced chip scale lead on chip semiconductor package and method of making same
US7064009B1 (en) 2001-04-04 2006-06-20 Amkor Technology, Inc. Thermally enhanced chip scale lead on chip semiconductor package and method of making same
JP4112816B2 (ja) * 2001-04-18 2008-07-02 株式会社東芝 半導体装置および半導体装置の製造方法
US6528880B1 (en) * 2001-06-25 2003-03-04 Lovoltech Inc. Semiconductor package for power JFET having copper plate for source and ribbon contact for gate
US6900527B1 (en) 2001-09-19 2005-05-31 Amkor Technology, Inc. Lead-frame method and assembly for interconnecting circuits within a circuit module
US7485952B1 (en) 2001-09-19 2009-02-03 Amkor Technology, Inc. Drop resistant bumpers for fully molded memory cards
KR100449241B1 (ko) * 2001-09-20 2004-09-18 (주)코브 테크놀로지 브리지 다이오드 및 그 제조 방법
US6630726B1 (en) 2001-11-07 2003-10-07 Amkor Technology, Inc. Power semiconductor package with strap
JP3780230B2 (ja) * 2002-07-03 2006-05-31 株式会社日立製作所 半導体モジュール及び電力変換装置
US6818973B1 (en) 2002-09-09 2004-11-16 Amkor Technology, Inc. Exposed lead QFP package fabricated through the use of a partial saw process
US6919620B1 (en) 2002-09-17 2005-07-19 Amkor Technology, Inc. Compact flash memory card with clamshell leadframe
US7190062B1 (en) 2004-06-15 2007-03-13 Amkor Technology, Inc. Embedded leadframe semiconductor package
US6905914B1 (en) 2002-11-08 2005-06-14 Amkor Technology, Inc. Wafer level package and fabrication method
US7361533B1 (en) 2002-11-08 2008-04-22 Amkor Technology, Inc. Stacked embedded leadframe
US7723210B2 (en) 2002-11-08 2010-05-25 Amkor Technology, Inc. Direct-write wafer level chip scale package
US6798047B1 (en) 2002-12-26 2004-09-28 Amkor Technology, Inc. Pre-molded leadframe
US6847099B1 (en) 2003-02-05 2005-01-25 Amkor Technology Inc. Offset etched corner leads for semiconductor package
US6943455B1 (en) * 2003-02-27 2005-09-13 Power-One Limited Packaging system for power supplies
US6750545B1 (en) 2003-02-28 2004-06-15 Amkor Technology, Inc. Semiconductor package capable of die stacking
US6927483B1 (en) 2003-03-07 2005-08-09 Amkor Technology, Inc. Semiconductor package exhibiting efficient lead placement
US7001799B1 (en) 2003-03-13 2006-02-21 Amkor Technology, Inc. Method of making a leadframe for semiconductor devices
US6794740B1 (en) 2003-03-13 2004-09-21 Amkor Technology, Inc. Leadframe package for semiconductor devices
US7095103B1 (en) 2003-05-01 2006-08-22 Amkor Technology, Inc. Leadframe based memory card
US7008825B1 (en) 2003-05-27 2006-03-07 Amkor Technology, Inc. Leadframe strip having enhanced testability
US6897550B1 (en) 2003-06-11 2005-05-24 Amkor Technology, Inc. Fully-molded leadframe stand-off feature
US7245007B1 (en) 2003-09-18 2007-07-17 Amkor Technology, Inc. Exposed lead interposer leadframe package
US6921967B2 (en) * 2003-09-24 2005-07-26 Amkor Technology, Inc. Reinforced die pad support structure
US7138707B1 (en) 2003-10-21 2006-11-21 Amkor Technology, Inc. Semiconductor package including leads and conductive posts for providing increased functionality
US7144517B1 (en) 2003-11-07 2006-12-05 Amkor Technology, Inc. Manufacturing method for leadframe and for semiconductor package using the leadframe
US7211879B1 (en) 2003-11-12 2007-05-01 Amkor Technology, Inc. Semiconductor package with chamfered corners and method of manufacturing the same
US7057268B1 (en) 2004-01-27 2006-06-06 Amkor Technology, Inc. Cavity case with clip/plug for use on multi-media card
US7091594B1 (en) 2004-01-28 2006-08-15 Amkor Technology, Inc. Leadframe type semiconductor package having reduced inductance and its manufacturing method
US20080003722A1 (en) * 2004-04-15 2008-01-03 Chun David D Transfer mold solution for molded multi-media card
US7202554B1 (en) 2004-08-19 2007-04-10 Amkor Technology, Inc. Semiconductor package and its manufacturing method
US7217991B1 (en) 2004-10-22 2007-05-15 Amkor Technology, Inc. Fan-in leadframe semiconductor package
US7507603B1 (en) 2005-12-02 2009-03-24 Amkor Technology, Inc. Etch singulated semiconductor package
US7572681B1 (en) 2005-12-08 2009-08-11 Amkor Technology, Inc. Embedded electronic component package
US7902660B1 (en) 2006-05-24 2011-03-08 Amkor Technology, Inc. Substrate for semiconductor device and manufacturing method thereof
US7968998B1 (en) 2006-06-21 2011-06-28 Amkor Technology, Inc. Side leaded, bottom exposed pad and bottom exposed lead fusion quad flat semiconductor package
US7741703B2 (en) * 2006-10-06 2010-06-22 Vishay General Semiconductor Llc Electronic device and lead frame
US7687893B2 (en) 2006-12-27 2010-03-30 Amkor Technology, Inc. Semiconductor package having leadframe with exposed anchor pads
US7829990B1 (en) 2007-01-18 2010-11-09 Amkor Technology, Inc. Stackable semiconductor package including laminate interposer
US7982297B1 (en) 2007-03-06 2011-07-19 Amkor Technology, Inc. Stackable semiconductor package having partially exposed semiconductor die and method of fabricating the same
US7977774B2 (en) 2007-07-10 2011-07-12 Amkor Technology, Inc. Fusion quad flat semiconductor package
US7687899B1 (en) 2007-08-07 2010-03-30 Amkor Technology, Inc. Dual laminate package structure with embedded elements
US7777351B1 (en) 2007-10-01 2010-08-17 Amkor Technology, Inc. Thin stacked interposer package
US8089159B1 (en) 2007-10-03 2012-01-03 Amkor Technology, Inc. Semiconductor package with increased I/O density and method of making the same
US7847386B1 (en) 2007-11-05 2010-12-07 Amkor Technology, Inc. Reduced size stacked semiconductor package and method of making the same
US7956453B1 (en) 2008-01-16 2011-06-07 Amkor Technology, Inc. Semiconductor package with patterning layer and method of making same
US7723852B1 (en) 2008-01-21 2010-05-25 Amkor Technology, Inc. Stacked semiconductor package and method of making same
US9147649B2 (en) * 2008-01-24 2015-09-29 Infineon Technologies Ag Multi-chip module
US8067821B1 (en) 2008-04-10 2011-11-29 Amkor Technology, Inc. Flat semiconductor package with half package molding
US7768135B1 (en) 2008-04-17 2010-08-03 Amkor Technology, Inc. Semiconductor package with fast power-up cycle and method of making same
US7808084B1 (en) 2008-05-06 2010-10-05 Amkor Technology, Inc. Semiconductor package with half-etched locking features
US8125064B1 (en) 2008-07-28 2012-02-28 Amkor Technology, Inc. Increased I/O semiconductor package and method of making same
US8184453B1 (en) 2008-07-31 2012-05-22 Amkor Technology, Inc. Increased capacity semiconductor package
US7847392B1 (en) 2008-09-30 2010-12-07 Amkor Technology, Inc. Semiconductor device including leadframe with increased I/O
US7989933B1 (en) 2008-10-06 2011-08-02 Amkor Technology, Inc. Increased I/O leadframe and semiconductor device including same
US8008758B1 (en) 2008-10-27 2011-08-30 Amkor Technology, Inc. Semiconductor device with increased I/O leadframe
US8089145B1 (en) 2008-11-17 2012-01-03 Amkor Technology, Inc. Semiconductor device including increased capacity leadframe
US8072050B1 (en) 2008-11-18 2011-12-06 Amkor Technology, Inc. Semiconductor device with increased I/O leadframe including passive device
US7875963B1 (en) 2008-11-21 2011-01-25 Amkor Technology, Inc. Semiconductor device including leadframe having power bars and increased I/O
US7982298B1 (en) 2008-12-03 2011-07-19 Amkor Technology, Inc. Package in package semiconductor device
US8487420B1 (en) 2008-12-08 2013-07-16 Amkor Technology, Inc. Package in package semiconductor device with film over wire
US20170117214A1 (en) 2009-01-05 2017-04-27 Amkor Technology, Inc. Semiconductor device with through-mold via
US8680656B1 (en) 2009-01-05 2014-03-25 Amkor Technology, Inc. Leadframe structure for concentrated photovoltaic receiver package
US8058715B1 (en) 2009-01-09 2011-11-15 Amkor Technology, Inc. Package in package device for RF transceiver module
US8026589B1 (en) 2009-02-23 2011-09-27 Amkor Technology, Inc. Reduced profile stackable semiconductor package
US7960818B1 (en) 2009-03-04 2011-06-14 Amkor Technology, Inc. Conformal shield on punch QFN semiconductor package
US8575742B1 (en) 2009-04-06 2013-11-05 Amkor Technology, Inc. Semiconductor device with increased I/O leadframe including power bars
US8796561B1 (en) 2009-10-05 2014-08-05 Amkor Technology, Inc. Fan out build up substrate stackable package and method
US8937381B1 (en) 2009-12-03 2015-01-20 Amkor Technology, Inc. Thin stackable package and method
US9691734B1 (en) 2009-12-07 2017-06-27 Amkor Technology, Inc. Method of forming a plurality of electronic component packages
US8324511B1 (en) 2010-04-06 2012-12-04 Amkor Technology, Inc. Through via nub reveal method and structure
US8294276B1 (en) 2010-05-27 2012-10-23 Amkor Technology, Inc. Semiconductor device and fabricating method thereof
US8440554B1 (en) 2010-08-02 2013-05-14 Amkor Technology, Inc. Through via connected backside embedded circuit features structure and method
US8487445B1 (en) 2010-10-05 2013-07-16 Amkor Technology, Inc. Semiconductor device having through electrodes protruding from dielectric layer
US8791501B1 (en) 2010-12-03 2014-07-29 Amkor Technology, Inc. Integrated passive device structure and method
US8674485B1 (en) 2010-12-08 2014-03-18 Amkor Technology, Inc. Semiconductor device including leadframe with downsets
CN102157471B (zh) * 2010-12-29 2012-08-15 常州星海电子有限公司 双层叠片式贴片型整流全桥
US8390130B1 (en) 2011-01-06 2013-03-05 Amkor Technology, Inc. Through via recessed reveal structure and method
CN102593108B (zh) * 2011-01-18 2014-08-20 台达电子工业股份有限公司 功率半导体封装结构及其制造方法
TWI557183B (zh) 2015-12-16 2016-11-11 財團法人工業技術研究院 矽氧烷組成物、以及包含其之光電裝置
US8648450B1 (en) 2011-01-27 2014-02-11 Amkor Technology, Inc. Semiconductor device including leadframe with a combination of leads and lands
US8552548B1 (en) 2011-11-29 2013-10-08 Amkor Technology, Inc. Conductive pad on protruding through electrode semiconductor device
US9704725B1 (en) 2012-03-06 2017-07-11 Amkor Technology, Inc. Semiconductor device with leadframe configured to facilitate reduced burr formation
US9048298B1 (en) 2012-03-29 2015-06-02 Amkor Technology, Inc. Backside warpage control structure and fabrication method
US9129943B1 (en) 2012-03-29 2015-09-08 Amkor Technology, Inc. Embedded component package and fabrication method
KR101486790B1 (ko) 2013-05-02 2015-01-28 앰코 테크놀로지 코리아 주식회사 강성보강부를 갖는 마이크로 리드프레임
KR101563911B1 (ko) 2013-10-24 2015-10-28 앰코 테크놀로지 코리아 주식회사 반도체 패키지
DE102014104819A1 (de) * 2014-03-26 2015-10-01 Heraeus Deutschland GmbH & Co. KG Träger und/oder Clip für Halbleiterelemente, Halbleiterbauelement und Verfahren zur Herstellung
US9673122B2 (en) 2014-05-02 2017-06-06 Amkor Technology, Inc. Micro lead frame structure having reinforcing portions and method
CN106206528B (zh) * 2016-09-07 2018-08-28 四川上特科技有限公司 基于双向tvs高压脉冲抑制的整流桥及其制作工艺
WO2018211680A1 (ja) * 2017-05-19 2018-11-22 新電元工業株式会社 電子モジュール
JP6511584B2 (ja) * 2017-05-19 2019-05-15 新電元工業株式会社 チップモジュールの製造方法
JP6463558B1 (ja) 2017-05-19 2019-02-06 新電元工業株式会社 電子モジュール、リードフレーム及び電子モジュールの製造方法
JP6522243B1 (ja) 2017-07-14 2019-05-29 新電元工業株式会社 電子モジュール
US11658109B2 (en) 2017-07-14 2023-05-23 Shindengen Electric Manufacturing Co., Ltd. Electronic module

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3995310A (en) * 1974-12-23 1976-11-30 General Electric Company Semiconductor assembly including mounting plate with recessed periphery
JPS5871633A (ja) * 1981-10-23 1983-04-28 Toshiba Corp 圧接型半導体装置
US4607277A (en) * 1982-03-16 1986-08-19 International Business Machines Corporation Semiconductor assembly employing noneutectic alloy for heat dissipation
JPS60101958A (ja) * 1983-11-08 1985-06-06 Rohm Co Ltd ダイオ−ド装置の製造方法
CH668667A5 (de) * 1985-11-15 1989-01-13 Bbc Brown Boveri & Cie Leistungshalbleitermodul.
US4724474A (en) * 1986-12-05 1988-02-09 Zenith Electronics Corporation Power bridge rectifier assembly
JPS63150954A (ja) * 1986-12-16 1988-06-23 Toshiba Corp ブリツジ型半導体装置
US4935803A (en) * 1988-09-09 1990-06-19 Motorola, Inc. Self-centering electrode for power devices

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002035613A1 (en) * 2000-10-20 2002-05-02 Josuke Nakata Light-emitting or light-detecting semiconductor module and method of manufacture thereof
AU773471B2 (en) * 2000-10-20 2004-05-27 Sphelar Power Corporation Light-emitting or light-detecting semiconductor module and method of manufacture thereof
US7205626B1 (en) * 2000-10-20 2007-04-17 Josuke Nakata Light-emitting or light-receiving with plurality of particle-shaped semiconductor devices having light-emitting or light-receiving properties
DE10303463A1 (de) * 2003-01-29 2004-08-19 Infineon Technologies Ag Halbleiterbauelement mit wenigstens zwei in einem Gehäuse integrierten und durch einen gemeinsamen Kontaktbügel kontakierten Chips
US7053474B2 (en) 2003-01-29 2006-05-30 Infineon Technologies Ag Semiconductor component having at least two chips which are integrated in a housing and with which contact is made by a common contact chip
DE10303463B4 (de) * 2003-01-29 2006-06-14 Infineon Technologies Ag Halbleiterbauelement mit wenigstens zwei in einem Gehäuse integrierten und durch einen gemeinsamen Kontaktbügel kontaktierten Chips
JP2016036047A (ja) * 2015-11-04 2016-03-17 トヨタ自動車株式会社 パワーモジュール

Also Published As

Publication number Publication date
JPH0671062B2 (ja) 1994-09-07
US5218231A (en) 1993-06-08

Similar Documents

Publication Publication Date Title
JPH0385755A (ja) 樹脂封止型半導体装置
JP5004800B2 (ja) 炭化ケイ素デバイス用のはんだ付け可能上部金属
US6803667B2 (en) Semiconductor device having a protective film
US4388635A (en) High breakdown voltage semiconductor device
JPS59121871A (ja) 半導体装置
US20210234007A1 (en) SiC SEMICONDUCTOR DEVICE
JP3432708B2 (ja) 半導体装置と半導体モジュール
JP3601529B2 (ja) 半導体装置
US5521436A (en) Semiconductor device with a foil-sealed lid
JP3357394B2 (ja) 両方向サージサプレッサ回路
JPH06177242A (ja) 半導体集積回路装置
US10236430B2 (en) Thermoelectric module
JPH09213880A (ja) 内部圧接型半導体装置
GB973722A (en) Improvements in or relating to semiconductor devices
JPH03177069A (ja) ショットキー・バリア・ダイオード
JPS584815B2 (ja) 半導体装置の製造方法
JP4017625B2 (ja) 半導体装置の製造方法
JPS61234588A (ja) 光半導体素子用サブマウント
JPH079919B2 (ja) 半導体装置
JPH0666043U (ja) 半導体発光素子
US3678346A (en) Semiconductor device and method of making the same
JPS61128548A (ja) 半導体装置
CA1222576A (en) Semiconductor device with improved support member
KR100216736B1 (ko) 캐소드 공통 및 애노드 공통 병렬 다이오드 및 다이오드 모듈 제조방법
JPS62122290A (ja) 発光素子

Legal Events

Date Code Title Description
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20070907

Year of fee payment: 13

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080907

Year of fee payment: 14

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080907

Year of fee payment: 14

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090907

Year of fee payment: 15

EXPY Cancellation because of completion of term