JPH0385755A - 樹脂封止型半導体装置 - Google Patents

樹脂封止型半導体装置

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Publication number
JPH0385755A
JPH0385755A JP1223865A JP22386589A JPH0385755A JP H0385755 A JPH0385755 A JP H0385755A JP 1223865 A JP1223865 A JP 1223865A JP 22386589 A JP22386589 A JP 22386589A JP H0385755 A JPH0385755 A JP H0385755A
Authority
JP
Japan
Prior art keywords
connector
electrode
semiconductor device
lead frame
die stage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1223865A
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English (en)
Other versions
JPH0671062B2 (ja
Inventor
Yoshimasa Kudo
工藤　好正
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
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Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP1223865A priority Critical patent/JPH0671062B2/ja
Priority to US07/571,972 priority patent/US5218231A/en
Publication of JPH0385755A publication Critical patent/JPH0385755A/ja
Publication of JPH0671062B2 publication Critical patent/JPH0671062B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Die Bonding (AREA)
  • Rectifiers (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。

Description

【発明の詳細な説明】 〔発明の目的〕 （産業上の利用分野） 本発明は、電源整流用樹脂封止型半導体装置に係わり、
特に、ブリッジ（［３ｒｉｄｇｅ）回路を描或する樹脂
封止型半導体装置に好適する。
（従来の技術） ブリッジ回路を利用する電源整流樹脂封止型半導体装置
には、いわゆるメサ（Ｍｅｓａ）型ダイオード（Ｄｉｏ
ｄｅ）またはブレイナー（Ｐｌａｎｅｒ）型ダイオード
により形成するブリッジ回路を利用しており、その組立
方式は、幾多の変遷を経た上でリードフレーム（Ｌｅａ
ｄ　Ｆｒａｍｅ）を利用する手法も利用されている。こ
の電源整流用樹脂封止型半導体装置を、第１図の斜視図
及びこれをＡ−Ａ線により切断した第２図の断面図更に
、半導体素子の構造を示す第３図断面図により説明する
。即ち、ブリッジ回路を構成する半導体素子として利用
するプレイナ型またはメサ型のダイオードが適用されて
いるが、順序不同であるが第３図断面図に示したブレイ
ナー型について説明する。
ダイオードに必要な、反対の極性を示すＮ及びＰ型の不
純物領域１．２が半導体素子を構成するシリコン半導体
基板（特に図示せず）に形成されており、更にＮ十領域
３も記載されている。このＮ十領域３は、半導体基板内
に多数のプレイナー型半導体素子を形成するのに必要な
分離領域として機能するものであると共に、Ｎ十領域３
に形成するダイシングライン（Ｄｉｃｉｎｇ　Ｌｉｎｅ
図示せず）に沿ってプレイキング（Ｂｒａｋｉｎｇ）処
理して個別の半導体素子を形成する役割も果たす。
図にあるように、Ｐ十領域２とＮ十領域３には、夫々導
電性金属層４．５を被覆して電極層４．５を形成してい
る外に、常法の熱酸化法により熱酸化膜６を被覆後、フ
ォトリソグラフィ（Ｐｈｏｔ。
Ｌｊ　ｔｈｏｇｒａｐｈｙ）法によりパターニング（Ｐ
ａｔｔｅｒｎｊｎｇ）された状態が図示されており、半
導体基板表面に露出する接合端部７．８を被覆している
。
これに対してメサ型半導体素子では、図示していないが
接合端部をメサ状部分に露出しているのが特徴である。
即ち、半導体基板の厚さ方向に正または負ベベル（Ｂｅ
ｖｅｌ）もしくは両方を備えた傾斜面を機械的または化
学的さらには両方を組合わせた手段によって形成する。
そして、上記のようにこの傾斜面に露出したダイオード
に不可欠な接合端部をシリコンゴムなとのエンキャップ
（ｃｎｃａｐｅ）材で被覆・保護するのが通常である。
ところで、このような構造を持ったダイオードの複数個
によりブリッジ回路を構成する電源整流樹脂封止型半導
体装置が市販されているが、その組立工程には、いわゆ
るリードフレームを利用する方式が採用されており、第
１図の斜視図及びこれをＡ−Ａ線で切断した断面図によ
り説明する。
コネクター（Ｃｏｎｎｅｃｔｅｒ）　Ｉ　Ｏは、インナ
ーリード（Ｉｎｎｅｒ　Ｌｅａｄ）　９に半田層１２に
より固着して一体としており、ブリッジ回路に必要な４
個のブレイナーまたはメサ型半導体素子１３・・・を半
田層１２・・・を介してコネクターｌＯに固着する。更
に、このように半導体素子１３・・・を取付けたコネク
ター１０．１０には、リードフレーム１４に形成したダ
イステージ（ＤｉｅＳｔａｇｅ）１５に各半導体素子１
３．１３の裏面電極５．５を半田層１２を介して固着し
て互いに相対向するように取付ける。
次に、公知のトランスファーモールド（Ｔｒａｎｓｆ−
ｅｒ　Ｍｏ１ｄ）法により樹脂封止工程を施して封止樹
脂層１６を被覆して、電源整流樹脂封止型半導体装を完
成している。
（発明が解決しようとする課題） このような構造の樹脂封止型半導体装置にあっては、半
田層１２による取付工程が問題となる。
と言うのは、Ｐ＋側電極４をダイステージ１５に取付け
る際、半田層１２が平坦なダイステージ１５部分に広が
って、絶縁が必要なＮ十領域３、Ｐ領域２部分に接触す
る頻度が大きい。このため短絡不良が起こると共に、半
導体素子に必要な耐圧が取れない。
更に、半田層と半導体素子の接触面積が一定でないため
に応力バランスが崩れるためにしばしば割れる事故が発
生した。
本発明は、このような事情により成されたもので、特に
、半田の拡がりによるＰ＋、Ｎ＋側電極との短絡不良及
び半導体素子を形成する半導体基板と、ダイステージや
コネクター間の接合面積不均一によるクラックを防止す
ることを目的とするものである。
〔発明の構成〕
（課題を解決するための手段） 半導体基板内にＰＮ接合を形成する複数の半導体素子と
、このＰＮ接合を構成する相反する導電型の不純物領域
に夫々形成する電極と、この電極に対応するダイステー
ジの両面に形成するエンボス部と、この両エンボス部と
各電極間に形成する第１固着層と、エンボス部と固着し
ていない各電極とコネクター間に形成する第２固着層と
、このコネクターに接続するリードと、これらを被覆す
る封止樹脂層に本発明に係わる樹脂封止型半導体装置の
特徴がある。
（作　用） このように本発明では、半田層の拡がりをエンボス範囲
に抑制できるので、厚さを従来より大きくして、疲労特
性を改善できる。更に、半導体素子に形成する電極との
半田付面積を一定に維持することができるために、面積
差による応力も防止でき、ひいてはクラック発生も改善
できる。
（実施例） 以下本発明に係わる一実施例を第４図〜第６図を参照し
て説明するが、第４図にブレイナー型ダイオード２０、
第６図にメサ型ダイオード２１の使用例が示されており
、メサ型ダイオードについて先ず説明する。図に明らか
にされていないが、第３図に明らかなようにＮ−型シリ
コン半導体基板表面に常法により被着した熱酸化膜には
、フォトリソグラフィ法によるバターニング工程を施し
て窓を形成後反対導電型の不純物例えばＢを拡散または
イオン注入法により導入してＰ生型領域を設置すると共
に接合を形成するが、メサ型構造の特徴として接合端部
をシリコン半導体基板の厚さ方向に導出する。更に、図
示していないが、シリコン半導体基板の厚さ方向には、
正、負または両者を併用した傾斜ベベル面を形式して接
合端部と交差させて素子の耐圧特性を満足させる。この
傾斜面にはシリコンゴムなどからなる材料をエンキャッ
プ処理して保護するのは勿論である。
傾斜面の角度及び方向は、素子特性即ち求める耐圧と各
領域の不純物濃度により決定されるのでいちがいには決
められない。これに対してブレイナー型ダイオード２０
は、第３図に示した構造通りであるので説明は省略する
。
本発明では、半導体素子であるブレイナー型ダイオード
２０またはメサ型ダイオード２１を、リードフレームに
形成するダイステージ２２と、コネクタ２３の一部を構
成するインナーリード２４に一体に取付けたフォーミン
グリード２５とに半田層即ち第１固着層２６を介して設
置するが、いずれも後述するエンボス（Ｅｍｂｏｓｓ）
部３０ａ　、　３０ｂを形成するのが特徴である。即ち
、第５図に明らかにしたように、銅または銅合金などに
例えばプレス（Ｐｒｅｓｓ）工程を施してＤＩＰ　（Ｄ
ｕａｌ　Ｉｎ　Ｌｉｎｅ　Ｐａｃｋａｇｅ）用リードフ
レーム２８を利用する。リードフレーム２８の材質及び
形状は、これに限定されるものでなく、ＤＩＰまたはＳ
ＩＰ（Ｓｉｎｇｌｅ　Ｉｎ　Ｌｉｎｅ　Ｐａｃｋａｇｅ
）との混合形式や、鉄または鉄・ニッケル合金製でも良
いことは勿論である。このようなリードフレーム２８に
おけるダイステージ２２形成予定位置の外側を塑性加工
して金属材料が移動することによって環状の段差部２７
とその内側に突出したエンボス部３０ａ　、　３０ｂが
形成される（第５図参照、以後突出したダイステージ部
分をダイステージと記載する）。
ところで、電源整流樹脂封止型半導体装置に必要なブリ
ッジ回路用としてブレイナー型ダイオド２０をリードフ
レーム２８とコネクター２５により組立てるが、最小４
個のブレイナー型ダイオード２０でブリッジ回路を形成
する。このために第４図にあるように単一のブレイナー
型ダイオード２０を夫々半田層即ち第２の固着層２６に
より固着したコネクター２５を用意し、これをインナー
リード２３．２３によって一体とする。
このような組立工程を終えてからトランスファモールド
法により樹脂封止層２９を被覆して、電源整流樹脂封止
型半導体装置を完成する。第６図には、メサ型ダイオー
ド２１を４個利用して形成した電源整流樹脂封止型半導
体装置の断面図を示したが、第４図とダイオードの種類
を除いては全く同様なので説明は省略する。なお、完成
した状態は、第１図と同様である。
〔発明の効果〕
以上詳述したように、本発明ではダイステージにダイオ
ードを半田により固着する際、半田の拡がりをエンボス
部の範囲内に抑えられるので、半導体素子であるダイオ
ードのＰ側電極と一体となる半田層が流れてＮ中領域に
達する事故が防止できる。このために、半田層の量を多
くして、半導体素子即ち電源整流樹脂封止型半導体装置
に要求される熱疲労特性を改善することができる。
しかも、半導体基板を利用する半導体素子の両面に形式
した電極に固着する半田層間に形成される変成層範囲を
ほぼ一定に抑制できるので、その差により発生する応力
に起因するクラック（Ｃｒａｃｋ）も防止できる。この
ような利点は、ブレイナー型とメサ型の違いによらず達
成されることを付記しておく。
【図面の簡単な説明】
第１図は、従来の車輌用電源整流樹脂封止型半導体装置
の斜視図、第２図は、第１図をＡ−Ａ線で切断した断面
図、第３図は、ブレイナー型ダイオードの断面図、第４
図乃至第６図は、本発明０ に係わる車輌用電源整流樹脂封止型半導体装置の要部を
示す断面図である。 １〜３・・・不純物領域、 ４．５・・・電極、 ６・・・熱酸化膜、 ７．８・・・接合端部、 ９．１４．２３．２８・・・インナーリード、１０、２
５・・・コネクタ １２．２６・・・第１、第２半田層、 １３．２０．２１・・・半導体素子、 １５．２２・・・ダイステージ、 ２７・・・段差部、 ３０ａ　、　３０ｂ・・・エンボス。

Claims (1)

    【特許請求の範囲】
  1. 半導体基板内にＰＮ接合を形成する複数の半導体素子と
    、このＰＮ接合を構成する相反する導電形の不純物領域
    に夫々形成する電極と、この電極に対応するダイステー
    ジの両面に形成するエンボス部と、この両エンボス部と
    各電極間に形成する第１固着層と、エンボス部と固着し
    ていない各電極とコネクター間に形成する第２固着層と
    、このコネクターに接続するリードと、これらを被覆す
    る封止樹脂層を具備することを特徴とする樹脂封止型半
    導体装置。
JP1223865A 1989-08-30 1989-08-30 樹脂封止型半導体装置 Expired - Lifetime JPH0671062B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP1223865A JPH0671062B2 (ja) 1989-08-30 1989-08-30 樹脂封止型半導体装置
US07/571,972 US5218231A (en) 1989-08-30 1990-08-24 Mold-type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1223865A JPH0671062B2 (ja) 1989-08-30 1989-08-30 樹脂封止型半導体装置

Publications (2)

Publication Number Publication Date
JPH0385755A true JPH0385755A (ja) 1991-04-10
JPH0671062B2 JPH0671062B2 (ja) 1994-09-07

Family

ID=16804920

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (2)

Country Link
US (1) US5218231A (ja)
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