JP7581209B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP7581209B2
JP7581209B2 JP2021538510A JP2021538510A JP7581209B2 JP 7581209 B2 JP7581209 B2 JP 7581209B2 JP 2021538510 A JP2021538510 A JP 2021538510A JP 2021538510 A JP2021538510 A JP 2021538510A JP 7581209 B2 JP7581209 B2 JP 7581209B2
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circuit
memory
data
transistor
signal
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JPWO2021024083A5 (enExample
JPWO2021024083A1 (enExample
Inventor
宗広 上妻
貴彦 石津
健 青木
雅史 藤田
一馬 古谷
宏輔 佐々木
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/5443—Sum of products
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/405—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/54—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using elements simulating biological cells, e.g. neuron
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1069—I/O lines read out arrangements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1096—Write circuits, e.g. I/O line write drivers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/14—Dummy cell management; Sense reference voltage generators
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/50—Peripheral circuit region structures
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
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    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • G—PHYSICS
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    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/005—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor comprising combined but independently operative RAM-ROM, RAM-PROM, RAM-EPROM cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/564—Miscellaneous aspects
    • G11C2211/5641—Multilevel memory having cells with different number of storage levels
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/423—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

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  • Molecular Biology (AREA)
  • Neurology (AREA)
  • Semiconductor Memories (AREA)
  • Thin Film Transistor (AREA)
  • Dram (AREA)
  • Advance Control (AREA)
  • Microcomputers (AREA)
  • Memory System (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2021538510A 2019-08-08 2020-07-27 半導体装置 Active JP7581209B2 (ja)

Applications Claiming Priority (11)

Application Number Priority Date Filing Date Title
JP2019146209 2019-08-08
JP2019146209 2019-08-08
JP2019157623 2019-08-30
JP2019157623 2019-08-30
JP2019216244 2019-11-29
JP2019216244 2019-11-29
JP2020038446 2020-03-06
JP2020038446 2020-03-06
JP2020087645 2020-05-19
JP2020087645 2020-05-19
PCT/IB2020/057051 WO2021024083A1 (ja) 2019-08-08 2020-07-27 半導体装置

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JPWO2021024083A1 JPWO2021024083A1 (enExample) 2021-02-11
JPWO2021024083A5 JPWO2021024083A5 (enExample) 2023-08-02
JP7581209B2 true JP7581209B2 (ja) 2024-11-12

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JP (1) JP7581209B2 (enExample)
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7356393B2 (ja) * 2020-04-10 2023-10-04 ルネサスエレクトロニクス株式会社 半導体装置
KR20240093546A (ko) 2021-10-27 2024-06-24 가부시키가이샤 한도오따이 에네루기 켄큐쇼 표시 장치
KR20240040918A (ko) * 2022-09-22 2024-03-29 삼성전자주식회사 연산 메모리 장치 및 그 장치를 이용한 방법

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019038664A1 (ja) 2017-08-25 2019-02-28 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法

Family Cites Families (61)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6941505B2 (en) * 2000-09-12 2005-09-06 Hitachi, Ltd. Data processing system and data processing method
JP5508662B2 (ja) * 2007-01-12 2014-06-04 株式会社半導体エネルギー研究所 表示装置
TWI670711B (zh) * 2010-09-14 2019-09-01 日商半導體能源研究所股份有限公司 記憶體裝置和半導體裝置
US20180107591A1 (en) * 2011-04-06 2018-04-19 P4tents1, LLC System, method and computer program product for fetching data between an execution of a plurality of threads
JP6001900B2 (ja) 2011-04-21 2016-10-05 株式会社半導体エネルギー研究所 信号処理回路
TWI536502B (zh) 2011-05-13 2016-06-01 半導體能源研究所股份有限公司 記憶體電路及電子裝置
US8837203B2 (en) 2011-05-19 2014-09-16 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP6013682B2 (ja) 2011-05-20 2016-10-25 株式会社半導体エネルギー研究所 半導体装置の駆動方法
JP2013130802A (ja) 2011-12-22 2013-07-04 Semiconductor Energy Lab Co Ltd 半導体装置、画像表示装置、記憶装置、及び電子機器
KR102433736B1 (ko) 2012-01-23 2022-08-19 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
US9372694B2 (en) 2012-03-29 2016-06-21 Semiconductor Energy Laboratory Co., Ltd. Reducing data backup and recovery periods in processors
KR102044725B1 (ko) 2012-03-29 2019-11-14 가부시키가이샤 한도오따이 에네루기 켄큐쇼 전원 제어 장치
KR102107591B1 (ko) 2012-07-18 2020-05-07 가부시키가이샤 한도오따이 에네루기 켄큐쇼 기억 소자 및 프로그래머블 로직 디바이스
JP2014112213A (ja) 2012-10-30 2014-06-19 Semiconductor Energy Lab Co Ltd 表示装置の駆動方法
US20160028544A1 (en) * 2012-11-15 2016-01-28 Elwha Llc Random number generator functions in memory
JP2014142986A (ja) 2012-12-26 2014-08-07 Semiconductor Energy Lab Co Ltd 半導体装置
US10068054B2 (en) * 2013-01-17 2018-09-04 Edico Genome, Corp. Bioinformatics systems, apparatuses, and methods executed on an integrated circuit processing platform
US9786350B2 (en) 2013-03-18 2017-10-10 Semiconductor Energy Laboratory Co., Ltd. Memory device
TWI638519B (zh) 2013-05-17 2018-10-11 半導體能源研究所股份有限公司 可程式邏輯裝置及半導體裝置
US8994430B2 (en) 2013-05-17 2015-03-31 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US9406348B2 (en) 2013-12-26 2016-08-02 Semiconductor Energy Laboratory Co., Ltd. Memory cell including transistor and capacitor
JP6442321B2 (ja) * 2014-03-07 2018-12-19 株式会社半導体エネルギー研究所 半導体装置及びその駆動方法、並びに電子機器
JP6580863B2 (ja) 2014-05-22 2019-09-25 株式会社半導体エネルギー研究所 半導体装置、健康管理システム
JP6373690B2 (ja) * 2014-09-05 2018-08-15 ルネサスエレクトロニクス株式会社 半導体装置
JP6420617B2 (ja) * 2014-09-30 2018-11-07 ルネサスエレクトロニクス株式会社 半導体装置
US10097182B2 (en) * 2014-12-31 2018-10-09 Stmicroelectronics, Inc. Integrated circuit layout wiring for multi-core chips
JP6754579B2 (ja) 2015-02-09 2020-09-16 株式会社半導体エネルギー研究所 半導体装置、記憶装置、電子機器
WO2016135591A1 (en) 2015-02-26 2016-09-01 Semiconductor Energy Laboratory Co., Ltd. Memory system and information processing system
JP6364543B2 (ja) * 2015-03-30 2018-07-25 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
ES2952609T3 (es) * 2015-05-13 2023-11-02 Nagravision Sarl Protección de chips de circuitos integrados contra las alteraciones físicas y/o eléctricas
JP6906940B2 (ja) * 2015-12-28 2021-07-21 株式会社半導体エネルギー研究所 半導体装置
WO2017125834A1 (en) * 2016-01-18 2017-07-27 Semiconductor Energy Laboratory Co., Ltd. Input/output device and data processor
JP6995481B2 (ja) 2016-01-29 2022-02-04 株式会社半導体エネルギー研究所 ソースドライバ
US10685614B2 (en) 2016-03-17 2020-06-16 Semiconductor Energy Laboratory Co., Ltd. Display device, display module, and electronic device
JP6921575B2 (ja) * 2016-03-30 2021-08-18 株式会社半導体エネルギー研究所 表示パネル
WO2018020332A1 (en) * 2016-07-29 2018-02-01 Semiconductor Energy Laboratory Co., Ltd. Display device and method for manufacturing the same
WO2018042285A1 (en) * 2016-08-30 2018-03-08 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, display device, and electronic device
US10483985B2 (en) * 2017-01-23 2019-11-19 Samsung Electronics Co., Ltd. Oscillator using supply regulation loop and operating method thereof
JP7042025B2 (ja) * 2017-01-23 2022-03-25 ソニーセミコンダクタソリューションズ株式会社 情報処理装置、情報処理方法、及び記録媒体
US10210594B2 (en) * 2017-03-03 2019-02-19 International Business Machines Corporation Deep learning via dynamic root solvers
WO2018211349A1 (ja) 2017-05-19 2018-11-22 株式会社半導体エネルギー研究所 半導体装置
JP7213803B2 (ja) * 2017-06-08 2023-01-27 株式会社半導体エネルギー研究所 半導体装置及び半導体装置の駆動方法
US11074953B2 (en) * 2017-06-16 2021-07-27 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, electronic component, and electronic device
JP7202297B2 (ja) 2017-07-14 2023-01-11 株式会社半導体エネルギー研究所 撮像装置および電子機器
JP7258754B2 (ja) * 2017-07-31 2023-04-17 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
JP7004453B2 (ja) * 2017-08-11 2022-01-21 株式会社半導体エネルギー研究所 グラフィックスプロセッシングユニット
US20190065253A1 (en) * 2017-08-30 2019-02-28 Intel Corporation Technologies for pre-configuring accelerators by predicting bit-streams
JP2019046199A (ja) * 2017-09-01 2019-03-22 株式会社半導体エネルギー研究所 プロセッサ、および電子機器
JP2019047006A (ja) 2017-09-05 2019-03-22 株式会社半導体エネルギー研究所 半導体装置、電子機器
WO2019048979A1 (ja) 2017-09-06 2019-03-14 株式会社半導体エネルギー研究所 電子機器
WO2019055307A1 (en) * 2017-09-15 2019-03-21 Cryptography Research, Inc. PACKAGING TECHNIQUES FOR REAR MESH CONNECTIVITY
US10607135B2 (en) 2017-10-19 2020-03-31 General Electric Company Training an auto-encoder on a single class
JP7267270B2 (ja) * 2018-05-31 2023-05-01 株式会社半導体エネルギー研究所 半導体装置
KR102871835B1 (ko) * 2018-08-09 2025-10-15 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 반도체 장치의 제작 방법
CN113330554B (zh) * 2019-01-29 2025-06-06 株式会社半导体能源研究所 存储装置
JP2020155185A (ja) * 2019-03-22 2020-09-24 キオクシア株式会社 半導体記憶装置
WO2020257976A1 (en) * 2019-06-24 2020-12-30 Intel Corporation Apparatus and method for scheduling graphics processing resources
US12175350B2 (en) * 2019-09-10 2024-12-24 Nvidia Corporation Machine-learning-based architecture search method for a neural network
US20210081353A1 (en) * 2019-09-17 2021-03-18 Micron Technology, Inc. Accelerator chip connecting a system on a chip and a memory chip
WO2021053453A1 (ja) 2019-09-20 2021-03-25 株式会社半導体エネルギー研究所 半導体装置
US11803471B2 (en) * 2021-08-23 2023-10-31 Apple Inc. Scalable system on a chip

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019038664A1 (ja) 2017-08-25 2019-02-28 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法

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