JP7554538B2 - 陥凹特徴部におけるボトムアップ金属化の方法 - Google Patents
陥凹特徴部におけるボトムアップ金属化の方法 Download PDFInfo
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- JP7554538B2 JP7554538B2 JP2022514988A JP2022514988A JP7554538B2 JP 7554538 B2 JP7554538 B2 JP 7554538B2 JP 2022514988 A JP2022514988 A JP 2022514988A JP 2022514988 A JP2022514988 A JP 2022514988A JP 7554538 B2 JP7554538 B2 JP 7554538B2
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- metal
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0186—Manufacturing their interconnections or electrodes, e.g. source or drain electrodes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
- H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
- H10W20/054—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by selectively removing parts thereof
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
- H10W20/0595—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches by using multiple deposition steps separated by etching steps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
- H10W20/427—Power or ground buses
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H10W20/076—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches
- H10W20/0765—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches the thin functional dielectric layers being temporary, e.g. sacrificial layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
- H10W20/44—Conductive materials thereof
- H10W20/4403—Conductive materials thereof based on metals, e.g. alloys, metal silicides
- H10W20/4432—Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being a noble metal, e.g. gold
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201962900794P | 2019-09-16 | 2019-09-16 | |
| US62/900,794 | 2019-09-16 | ||
| PCT/US2020/050962 WO2021055399A1 (en) | 2019-09-16 | 2020-09-16 | Method of bottom-up metallization in a recessed feature |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2022547126A JP2022547126A (ja) | 2022-11-10 |
| JP2022547126A5 JP2022547126A5 (enExample) | 2023-07-25 |
| JP7554538B2 true JP7554538B2 (ja) | 2024-09-20 |
Family
ID=74868656
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2022514988A Active JP7554538B2 (ja) | 2019-09-16 | 2020-09-16 | 陥凹特徴部におけるボトムアップ金属化の方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US11450562B2 (enExample) |
| JP (1) | JP7554538B2 (enExample) |
| KR (1) | KR102781731B1 (enExample) |
| CN (1) | CN114600232B (enExample) |
| TW (1) | TWI857139B (enExample) |
| WO (1) | WO2021055399A1 (enExample) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10573522B2 (en) | 2016-08-16 | 2020-02-25 | Lam Research Corporation | Method for preventing line bending during metal fill process |
| KR20210081436A (ko) | 2018-11-19 | 2021-07-01 | 램 리써치 코포레이션 | 텅스텐을 위한 몰리브덴 템플릿들 |
| SG11202108217UA (en) | 2019-01-28 | 2021-08-30 | Lam Res Corp | Deposition of metal films |
| WO2021046058A1 (en) | 2019-09-03 | 2021-03-11 | Lam Research Corporation | Molybdenum deposition |
| CN114667600A (zh) | 2019-10-15 | 2022-06-24 | 朗姆研究公司 | 钼填充 |
| JP7686761B2 (ja) | 2021-02-23 | 2025-06-02 | ラム リサーチ コーポレーション | 3d-nand用の酸化物表面上へのモリブデン膜の堆積 |
| WO2022221210A1 (en) | 2021-04-14 | 2022-10-20 | Lam Research Corporation | Deposition of molybdenum |
| US12588475B2 (en) | 2021-05-14 | 2026-03-24 | Lam Research Corporation | High selectivity doped hardmask films |
| WO2023286192A1 (ja) * | 2021-07-14 | 2023-01-19 | 株式会社日立ハイテク | プラズマ処理方法 |
| US12394660B2 (en) | 2021-11-22 | 2025-08-19 | International Business Machines Corporation | Buried power rail after replacement metal gate |
| WO2023215135A1 (en) * | 2022-05-05 | 2023-11-09 | Lam Research Corporation | Molybdenum halides in memory applications |
| US12506029B2 (en) * | 2022-06-30 | 2025-12-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Gap filling method in semiconductor manufacturing process |
| US20240290655A1 (en) * | 2023-02-28 | 2024-08-29 | Applied Materials, Inc. | Selective via-fill with conformal sidewall coverage |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009508003A (ja) | 2005-09-08 | 2009-02-26 | アプライド マテリアルズ インコーポレイテッド | 大面積エレクトロニクス用のパターン形成無電解金属化処理 |
| JP2017098539A (ja) | 2015-10-21 | 2017-06-01 | ウルトラテック インク | 自己組織化単分子層を用いたald抑制層の形成方法 |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040197541A1 (en) * | 2001-08-02 | 2004-10-07 | Joseph Zahka | Selective electroless deposition and interconnects made therefrom |
| DE102007004884A1 (de) * | 2007-01-31 | 2008-08-14 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zur Herstellung einer Metallschicht über einem strukturierten Dielektrikum durch stromlose Abscheidung unter Anwendung einer selektiv vorgesehenen Aktivierungsschicht |
| KR101556238B1 (ko) * | 2009-02-17 | 2015-10-01 | 삼성전자주식회사 | 매립형 배선라인을 갖는 반도체 소자의 제조방법 |
| KR20120033640A (ko) | 2010-09-30 | 2012-04-09 | 주식회사 하이닉스반도체 | 텅스텐 갭필을 이용한 반도체장치 제조 방법 |
| KR101185990B1 (ko) * | 2010-12-20 | 2012-09-25 | 에스케이하이닉스 주식회사 | 반도체 소자의 형성방법 |
| JP5599350B2 (ja) * | 2011-03-29 | 2014-10-01 | 東京エレクトロン株式会社 | 成膜装置及び成膜方法 |
| WO2016204771A1 (en) * | 2015-06-18 | 2016-12-22 | Intel Corporation | Bottom-up fill (buf) of metal features for semiconductor structures |
| EP3171409B1 (en) * | 2015-11-18 | 2020-12-30 | IMEC vzw | Method for forming a field effect transistor device having an electrical contact |
| KR102432719B1 (ko) * | 2015-12-23 | 2022-08-17 | 에스케이하이닉스 주식회사 | 매립금속게이트구조를 구비한 반도체장치 및 그 제조 방법, 그를 구비한 메모리셀, 그를 구비한 전자장치 |
| JP2018207110A (ja) * | 2017-06-06 | 2018-12-27 | 東京エレクトロン株式会社 | 二重金属電力レールを有する集積回路の製造方法 |
| US10453740B2 (en) * | 2017-06-29 | 2019-10-22 | Taiwan Semiconductor Manufacturing Co., Ltd. | Interconnect structure without barrier layer on bottom surface of via |
| JP2019106538A (ja) * | 2017-12-07 | 2019-06-27 | マイクロマテリアルズ エルエルシー | 制御可能な金属およびバリアライナー凹部のための方法 |
| US20190198392A1 (en) * | 2017-12-22 | 2019-06-27 | Applied Materials, Inc. | Methods of etching a tungsten layer |
| US10546815B2 (en) * | 2018-05-31 | 2020-01-28 | International Business Machines Corporation | Low resistance interconnect structure with partial seed enhancement liner |
| US10573725B1 (en) * | 2018-09-20 | 2020-02-25 | Nanya Technology Corporation | Semiconductor structure and manufacturing method thereof |
| US11784091B2 (en) * | 2019-08-30 | 2023-10-10 | Taiwan Semiconductor Manufacturing Co., Ltd. | Structure and formation method of chip package with fan-out feature |
-
2020
- 2020-09-15 US US17/021,586 patent/US11450562B2/en active Active
- 2020-09-16 CN CN202080064711.9A patent/CN114600232B/zh active Active
- 2020-09-16 JP JP2022514988A patent/JP7554538B2/ja active Active
- 2020-09-16 TW TW109131845A patent/TWI857139B/zh active
- 2020-09-16 KR KR1020227008755A patent/KR102781731B1/ko active Active
- 2020-09-16 WO PCT/US2020/050962 patent/WO2021055399A1/en not_active Ceased
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009508003A (ja) | 2005-09-08 | 2009-02-26 | アプライド マテリアルズ インコーポレイテッド | 大面積エレクトロニクス用のパターン形成無電解金属化処理 |
| JP2017098539A (ja) | 2015-10-21 | 2017-06-01 | ウルトラテック インク | 自己組織化単分子層を用いたald抑制層の形成方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| US11450562B2 (en) | 2022-09-20 |
| TWI857139B (zh) | 2024-10-01 |
| KR102781731B1 (ko) | 2025-03-13 |
| CN114600232B (zh) | 2026-01-16 |
| TW202127521A (zh) | 2021-07-16 |
| US20210082750A1 (en) | 2021-03-18 |
| CN114600232A (zh) | 2022-06-07 |
| WO2021055399A1 (en) | 2021-03-25 |
| JP2022547126A (ja) | 2022-11-10 |
| KR20220079526A (ko) | 2022-06-13 |
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