JP6948099B2 - マルチ閾値PMOSトランジスタのための埋め込みSiGeプロセス - Google Patents

マルチ閾値PMOSトランジスタのための埋め込みSiGeプロセス Download PDF

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JP6948099B2
JP6948099B2 JP2018512130A JP2018512130A JP6948099B2 JP 6948099 B2 JP6948099 B2 JP 6948099B2 JP 2018512130 A JP2018512130 A JP 2018512130A JP 2018512130 A JP2018512130 A JP 2018512130A JP 6948099 B2 JP6948099 B2 JP 6948099B2
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sige
transistor
gate
cavity
source
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JP2018526831A (ja
JP2018526831A5 (https=
Inventor
サン チョイ ヨウン
サン チョイ ヨウン
ジェイ リレイ デボラ
ジェイ リレイ デボラ
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テキサス インスツルメンツ インコーポレイテッド
テキサス インスツルメンツ インコーポレイテッド
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/791Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/797Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being in source or drain regions, e.g. SiGe source or drain
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/022Manufacture or treatment of FETs having insulated gates [IGFET] having lightly-doped source or drain extensions selectively formed at the sides of the gates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/01Manufacture or treatment
    • H10D62/021Forming source or drain recesses by etching e.g. recessing by etching and then refilling
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149Source or drain regions of field-effect devices
    • H10D62/151Source or drain regions of field-effect devices of IGFETs 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0128Manufacturing their channels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/013Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/601Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/82Heterojunctions
    • H10D62/822Heterojunctions comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions

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  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP2018512130A 2015-09-03 2016-09-06 マルチ閾値PMOSトランジスタのための埋め込みSiGeプロセス Active JP6948099B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/845,112 US10026837B2 (en) 2015-09-03 2015-09-03 Embedded SiGe process for multi-threshold PMOS transistors
US14/845,112 2015-09-03
PCT/US2016/050409 WO2017041098A1 (en) 2015-09-03 2016-09-06 Embedded sige process for multi-threshold pmos transistors

Publications (3)

Publication Number Publication Date
JP2018526831A JP2018526831A (ja) 2018-09-13
JP2018526831A5 JP2018526831A5 (https=) 2019-10-03
JP6948099B2 true JP6948099B2 (ja) 2021-10-13

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Country Link
US (2) US10026837B2 (https=)
EP (1) EP3345219B1 (https=)
JP (1) JP6948099B2 (https=)
CN (1) CN107924915B (https=)
WO (1) WO2017041098A1 (https=)

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CN110970487B (zh) * 2018-09-28 2023-12-19 台湾积体电路制造股份有限公司 半导体器件及其形成方法
US11315838B2 (en) 2018-09-28 2022-04-26 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET device and method of forming same
US12349454B2 (en) * 2022-02-17 2025-07-01 Taiwan Semiconductor Manufacturing Company, Ltd. Checkerboard dummy design for epitaxial open ratio

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Also Published As

Publication number Publication date
CN107924915B (zh) 2023-12-12
EP3345219B1 (en) 2022-07-13
US10026837B2 (en) 2018-07-17
US20170069755A1 (en) 2017-03-09
US20180308977A1 (en) 2018-10-25
WO2017041098A1 (en) 2017-03-09
EP3345219A4 (en) 2018-08-29
EP3345219A1 (en) 2018-07-11
JP2018526831A (ja) 2018-09-13
CN107924915A (zh) 2018-04-17

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