CN107924915B - 用于多阈值PMOS晶体管的嵌入式SiGe工艺 - Google Patents
用于多阈值PMOS晶体管的嵌入式SiGe工艺 Download PDFInfo
- Publication number
- CN107924915B CN107924915B CN201680043865.3A CN201680043865A CN107924915B CN 107924915 B CN107924915 B CN 107924915B CN 201680043865 A CN201680043865 A CN 201680043865A CN 107924915 B CN107924915 B CN 107924915B
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- China
- Prior art keywords
- pmos transistor
- sige
- cavity
- gate
- etching
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
- H10D30/797—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being in source or drain regions, e.g. SiGe source or drain
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/022—Manufacture or treatment of FETs having insulated gates [IGFET] having lightly-doped source or drain extensions selectively formed at the sides of the gates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/01—Manufacture or treatment
- H10D62/021—Forming source or drain recesses by etching e.g. recessing by etching and then refilling
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
- H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0128—Manufacturing their channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/013—Manufacturing their source or drain regions, e.g. silicided source or drain regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/82—Heterojunctions
- H10D62/822—Heterojunctions comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions
Landscapes
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US14/845,112 US10026837B2 (en) | 2015-09-03 | 2015-09-03 | Embedded SiGe process for multi-threshold PMOS transistors |
| US14/845,112 | 2015-09-03 | ||
| PCT/US2016/050409 WO2017041098A1 (en) | 2015-09-03 | 2016-09-06 | Embedded sige process for multi-threshold pmos transistors |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN107924915A CN107924915A (zh) | 2018-04-17 |
| CN107924915B true CN107924915B (zh) | 2023-12-12 |
Family
ID=58188618
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201680043865.3A Active CN107924915B (zh) | 2015-09-03 | 2016-09-06 | 用于多阈值PMOS晶体管的嵌入式SiGe工艺 |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US10026837B2 (https=) |
| EP (1) | EP3345219B1 (https=) |
| JP (1) | JP6948099B2 (https=) |
| CN (1) | CN107924915B (https=) |
| WO (1) | WO2017041098A1 (https=) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101776926B1 (ko) * | 2010-09-07 | 2017-09-08 | 삼성전자주식회사 | 반도체 소자 및 그 제조 방법 |
| CN110970487B (zh) * | 2018-09-28 | 2023-12-19 | 台湾积体电路制造股份有限公司 | 半导体器件及其形成方法 |
| US11315838B2 (en) | 2018-09-28 | 2022-04-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | FinFET device and method of forming same |
| US12349454B2 (en) * | 2022-02-17 | 2025-07-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Checkerboard dummy design for epitaxial open ratio |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000068388A (ja) * | 1998-08-25 | 2000-03-03 | Nec Corp | 半導体装置の製造方法 |
| CN1976030A (zh) * | 2005-11-30 | 2007-06-06 | 国际商业机器公司 | 集成电路及其制造方法 |
| CN103296027A (zh) * | 2012-02-28 | 2013-09-11 | 德克萨斯仪器股份有限公司 | 采用n沟道和p沟道mos晶体管的模拟浮动栅极存储器制造工艺 |
| CN104247023A (zh) * | 2012-03-20 | 2014-12-24 | 金本位模拟有限公司 | 抗变化的金属氧化物半导体场效应晶体管(mosfet) |
Family Cites Families (34)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6004854A (en) * | 1995-07-17 | 1999-12-21 | Micron Technology, Inc. | Method of forming CMOS integrated circuitry |
| US5899719A (en) * | 1997-02-14 | 1999-05-04 | United Semiconductor Corporation | Sub-micron MOSFET |
| US6632718B1 (en) * | 1998-07-15 | 2003-10-14 | Texas Instruments Incorporated | Disposable spacer technology for reduced cost CMOS processing |
| US6579751B2 (en) * | 1999-09-01 | 2003-06-17 | Micron Technology, Inc. | Semiconductor processing methods of forming integrated circuitry |
| US6754104B2 (en) * | 2000-06-22 | 2004-06-22 | Progressant Technologies, Inc. | Insulated-gate field-effect transistor integrated with negative differential resistance (NDR) FET |
| JP2004228528A (ja) * | 2003-01-27 | 2004-08-12 | Nec Electronics Corp | 半導体装置の製造方法 |
| US6906360B2 (en) * | 2003-09-10 | 2005-06-14 | International Business Machines Corporation | Structure and method of making strained channel CMOS transistors having lattice-mismatched epitaxial extension and source and drain regions |
| US7214575B2 (en) * | 2004-01-06 | 2007-05-08 | Micron Technology, Inc. | Method and apparatus providing CMOS imager device pixel with transistor having lower threshold voltage than other imager device transistors |
| US7208409B2 (en) * | 2004-03-17 | 2007-04-24 | Texas Instruments Incorporated | Integrated circuit metal silicide method |
| KR20060081110A (ko) * | 2005-01-07 | 2006-07-12 | 삼성전자주식회사 | 잉크젯 프린트헤드의 대칭형 노즐 형성 방법 |
| US7553717B2 (en) | 2007-05-11 | 2009-06-30 | Texas Instruments Incorporated | Recess etch for epitaxial SiGe |
| JP2008288366A (ja) * | 2007-05-17 | 2008-11-27 | Panasonic Corp | 半導体装置及びその製造方法 |
| JP2009124011A (ja) * | 2007-11-16 | 2009-06-04 | Renesas Technology Corp | 半導体装置 |
| JP5493382B2 (ja) * | 2008-08-01 | 2014-05-14 | ソニー株式会社 | 固体撮像装置、その製造方法および撮像装置 |
| JP5315889B2 (ja) * | 2008-09-22 | 2013-10-16 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
| DE102008049733B3 (de) * | 2008-09-30 | 2010-06-17 | Advanced Micro Devices, Inc., Sunnyvale | Transistor mit eingebettetem Si/Ge-Material mit geringerem Abstand zum Kanalgebiet und Verfahren zur Herstellung des Transistors |
| JP2010153683A (ja) * | 2008-12-26 | 2010-07-08 | Hitachi Ltd | 半導体装置 |
| US8405160B2 (en) * | 2010-05-26 | 2013-03-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Multi-strained source/drain structures |
| JP2012064657A (ja) * | 2010-09-14 | 2012-03-29 | Toshiba Corp | 半導体装置 |
| US8404551B2 (en) * | 2010-12-03 | 2013-03-26 | Suvolta, Inc. | Source/drain extension control for advanced transistors |
| US8901537B2 (en) * | 2010-12-21 | 2014-12-02 | Intel Corporation | Transistors with high concentration of boron doped germanium |
| US9496359B2 (en) * | 2011-03-28 | 2016-11-15 | Texas Instruments Incorporated | Integrated circuit having chemically modified spacer surface |
| US20130026575A1 (en) * | 2011-07-28 | 2013-01-31 | Synopsys, Inc. | Threshold adjustment of transistors by controlled s/d underlap |
| US9153690B2 (en) * | 2012-03-01 | 2015-10-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | MOS devices with modulated performance and methods for forming the same |
| CN103545212B (zh) * | 2012-07-16 | 2016-09-21 | 中国科学院微电子研究所 | 半导体器件制造方法 |
| US9136179B2 (en) * | 2012-10-18 | 2015-09-15 | Globalfoundries Singapore Pte. Ltd. | High gain device |
| KR102059526B1 (ko) * | 2012-11-22 | 2019-12-26 | 삼성전자주식회사 | 내장 스트레서를 갖는 반도체 소자 형성 방법 및 관련된 소자 |
| TWI643346B (zh) * | 2012-11-22 | 2018-12-01 | 三星電子股份有限公司 | 在凹處包括一應力件的半導體裝置及其形成方法(三) |
| US8753902B1 (en) * | 2013-03-13 | 2014-06-17 | United Microelectronics Corp. | Method of controlling etching process for forming epitaxial structure |
| CN104183490B (zh) | 2013-05-21 | 2017-11-28 | 中芯国际集成电路制造(上海)有限公司 | Mos晶体管的形成方法 |
| US9224656B2 (en) | 2013-07-25 | 2015-12-29 | Texas Instruments Incorporated | Method of CMOS manufacturing utilizing multi-layer epitaxial hardmask films for improved gate spacer control |
| US9093298B2 (en) | 2013-08-22 | 2015-07-28 | Texas Instruments Incorporated | Silicide formation due to improved SiGe faceting |
| US9142672B2 (en) * | 2013-09-10 | 2015-09-22 | Taiwan Semiconductor Manufacturing Co., Ltd | Strained source and drain (SSD) structure and method for forming the same |
| US20150214116A1 (en) | 2014-01-27 | 2015-07-30 | Globalfoundries Inc. | Low leakage pmos transistor |
-
2015
- 2015-09-03 US US14/845,112 patent/US10026837B2/en active Active
-
2016
- 2016-09-06 WO PCT/US2016/050409 patent/WO2017041098A1/en not_active Ceased
- 2016-09-06 EP EP16843189.8A patent/EP3345219B1/en active Active
- 2016-09-06 CN CN201680043865.3A patent/CN107924915B/zh active Active
- 2016-09-06 JP JP2018512130A patent/JP6948099B2/ja active Active
-
2018
- 2018-07-02 US US16/025,223 patent/US20180308977A1/en not_active Abandoned
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000068388A (ja) * | 1998-08-25 | 2000-03-03 | Nec Corp | 半導体装置の製造方法 |
| CN1976030A (zh) * | 2005-11-30 | 2007-06-06 | 国际商业机器公司 | 集成电路及其制造方法 |
| CN103296027A (zh) * | 2012-02-28 | 2013-09-11 | 德克萨斯仪器股份有限公司 | 采用n沟道和p沟道mos晶体管的模拟浮动栅极存储器制造工艺 |
| CN104247023A (zh) * | 2012-03-20 | 2014-12-24 | 金本位模拟有限公司 | 抗变化的金属氧化物半导体场效应晶体管(mosfet) |
Also Published As
| Publication number | Publication date |
|---|---|
| EP3345219B1 (en) | 2022-07-13 |
| US10026837B2 (en) | 2018-07-17 |
| US20170069755A1 (en) | 2017-03-09 |
| US20180308977A1 (en) | 2018-10-25 |
| WO2017041098A1 (en) | 2017-03-09 |
| JP6948099B2 (ja) | 2021-10-13 |
| EP3345219A4 (en) | 2018-08-29 |
| EP3345219A1 (en) | 2018-07-11 |
| JP2018526831A (ja) | 2018-09-13 |
| CN107924915A (zh) | 2018-04-17 |
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