JP6727328B2 - 半導体モジュール - Google Patents
半導体モジュール Download PDFInfo
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- JP6727328B2 JP6727328B2 JP2018552283A JP2018552283A JP6727328B2 JP 6727328 B2 JP6727328 B2 JP 6727328B2 JP 2018552283 A JP2018552283 A JP 2018552283A JP 2018552283 A JP2018552283 A JP 2018552283A JP 6727328 B2 JP6727328 B2 JP 6727328B2
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- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
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- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
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- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
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Description
図1は本発明に係る実施の形態1の半導体モジュール100の構成を示す図であり、パッケージPKG内の構造を示すため、パッケージPKGを省略して示している。また、図2はパッケージPKGで封止された状態の半導体モジュール100の上面側の外観を示している。
図4は本発明に係る実施の形態2の半導体モジュール200の構成を示す図であり、パッケージPKG内の構造を示すため、パッケージPKGを省略して示している。また、図5はパッケージPKGで封止された状態の半導体モジュール200の上面側の外観を示している。
図6は本発明に係る実施の形態3の半導体モジュール300の構成を示す図であり、パッケージPKG内の構造を示すため、パッケージPKGを省略して示している。また、図7はパッケージPKGで封止された状態の半導体モジュール300の下面(裏面)側の外観を示しており、図8は、図6におけるA−B線での矢視方向の断面を示す図である。
図10は本発明に係る実施の形態4の半導体モジュール400の構成を示す図であり、パッケージPKG内の構造を示すため、パッケージPKGを省略して示している。また、図11はパッケージPKGで封止された状態の半導体モジュール400の下面(裏面)側の外観を示しており、図12は、図10におけるA−B線での矢視方向の断面を示す図である。
図13は本発明に係る実施の形態5の半導体モジュール500の構成を示す図であり、パッケージPKG内の構造を示すため、パッケージPKGを省略して示している。また、図14はパッケージPKGで封止された状態の半導体モジュール500の下面(裏面)側の外観を示しており、図15は、図13におけるA−B線での矢視方向の断面を示す図である。
図16は本発明に係る実施の形態6の半導体モジュール600の構成を示す図であり、パッケージPKG内の構造を示すため、パッケージPKGを省略して示している。また、図17はパッケージPKGで封止された状態の半導体モジュール600の下面(裏面)側の外観を示しており、図18は、図16におけるA−B線での矢視方向の断面を示す図である。
Claims (6)
- 第1の電位と前記第1の電位よりも低い第2の電位との間に直列に介挿され、相補的に動作する少なくとも1組の第1および第2のスイッチングデバイスと、
前記第1のスイッチングデバイスの駆動制御を行う第1の駆動回路と、
前記第2のスイッチングデバイスの駆動制御を行う第2の駆動回路と、を備え、
前記少なくとも1組の第1および第2のスイッチングデバイス、前記第1および第2の駆動回路が平面視形状が矩形のパッケージに封止された半導体モジュールであって、
前記パッケージの第1および第2の長辺のうち、前記第1の長辺の側面から突出するように設けられ、前記第1および第2の駆動回路の制御信号が入力される制御端子と、
前記第2の長辺の側面から突出するように設けられ、前記第1および第2のスイッチングデバイスの出力が与えられる出力端子と、
回路基板への実装時に前記回路基板に面する側となる前記パッケージの裏面に設けられた第1の開口部から表面の一部が露出し、露出した部分に前記第1の電位が与えられる第1の主端子と、
前記裏面に設けられた第2の開口部から表面の一部が露出し、露出した部分に前記第2の電位が与えられる第2の主端子と、を備え、
前記第1の主端子は、
前記パッケージの前記裏面に向けて折れ曲がる部分と、前記第1の開口部において前記パッケージの裏面と平行になるように折れ曲がり前記第1の開口部から露出する部分と、前記パッケージの前記裏面とは反対側に向けて折れ曲がる部分とを有し、
前記第2の主端子は、
前記パッケージの前記裏面に向けて折れ曲がる部分と、前記第2の開口部において前記パッケージの裏面と平行になるように折れ曲がり前記第1の開口部から露出する部分と、前記パッケージの前記裏面とは反対側に向けて折れ曲がる部分とを有する、半導体モジュール。 - 前記第1の長辺の側面から突出するように設けられ、前記第1の駆動回路の基準電圧が与えられる基準電圧端子と、
前記基準電圧端子に隣り合って設けられ、前記第1の駆動回路の駆動電圧が与えられる駆動電圧端子と、を備える、請求項1記載の半導体モジュール。 - 前記第1の長辺の側面から突出するように設けられ、前記第1の駆動回路の駆動電圧が与えられる駆動電圧端子と、を備え、
前記駆動電圧端子は、前記出力端子に隣り合って設けられる、請求項1記載の半導体モジュール。 - 前記パッケージの第1および第2の短辺のうち、前記第1の短辺の側面から突出するように設けられ、前記第1の駆動回路の基準電圧が与えられる基準電圧端子と、
前記基準電圧端子に隣り合って設けられ、前記第1の駆動回路の駆動電圧が与えられる駆動電圧端子と、を備える、請求項1記載の半導体モジュール。 - 第1の電位と前記第1の電位よりも低い第2の電位との間に直列に介挿され、相補的に動作する少なくとも1組の第1および第2のスイッチングデバイスと、
前記第1のスイッチングデバイスの駆動制御を行う第1の駆動回路と、
前記第2のスイッチングデバイスの駆動制御を行う第2の駆動回路と、を備え、
前記少なくとも1組の第1および第2のスイッチングデバイス、前記第1および第2の駆動回路が平面視形状が矩形のパッケージに封止された半導体モジュールであって、
前記パッケージの第1および第2の長辺のうち、前記第1の長辺の側面から突出するように設けられ、前記第1および第2の駆動回路の制御信号が入力される制御端子と、
前記第2の長辺の側面から突出するように設けられ、前記第1の電位が与えられる第1の主端子と、
前記第2の長辺の側面から突出するように設けられ、前記第2の電位が与えられる第2の主端子と、
回路基板への実装時に前記回路基板に面する側となる前記パッケージの裏面に設けられた第3の開口部から表面の一部が露出し、露出した部分に前記第1および第2のスイッチングデバイスの出力が与えられる出力端子と、を備え、
前記出力端子は、
前記パッケージの前記裏面に向けて折れ曲がる部分と、前記第3の開口部において前記パッケージの裏面と平行になるように折れ曲がり前記第3の開口部から露出する部分と、前記パッケージの前記裏面とは反対側に向けて折れ曲がる部分とを有する、半導体モジュール。 - 前記第1の長辺の側面から突出するように設けられ、前記第1の駆動回路の駆動電圧が与えられる駆動電圧端子を備える、請求項5記載の半導体モジュール。
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PCT/JP2016/084553 WO2018096573A1 (ja) | 2016-11-22 | 2016-11-22 | 半導体モジュール |
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