JP6614116B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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JP6614116B2
JP6614116B2 JP2016237723A JP2016237723A JP6614116B2 JP 6614116 B2 JP6614116 B2 JP 6614116B2 JP 2016237723 A JP2016237723 A JP 2016237723A JP 2016237723 A JP2016237723 A JP 2016237723A JP 6614116 B2 JP6614116 B2 JP 6614116B2
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electrode
layer
gate
semiconductor
source
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Japanese (ja)
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JP2017212425A5 (OSRAM
JP2017212425A (ja
Inventor
浩幸 樽見
和博 小山
泳信 陰
真一 星
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Denso Corp
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Denso Corp
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Priority to CN201780031618.6A priority Critical patent/CN109155255B/zh
Priority to US16/092,492 priority patent/US10629716B2/en
Priority to PCT/JP2017/014410 priority patent/WO2017203849A1/ja
Publication of JP2017212425A publication Critical patent/JP2017212425A/ja
Publication of JP2017212425A5 publication Critical patent/JP2017212425A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/023—Manufacture or treatment of FETs having insulated gates [IGFET] having multiple independently-addressable gate electrodes influencing the same channel
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
    • H10D30/475—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/80—FETs having rectifying junction gate electrodes
    • H10D30/83—FETs having PN junction gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/82—Heterojunctions
    • H10D62/824—Heterojunctions comprising only Group III-V materials heterojunctions, e.g. GaN/AlGaN heterojunctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/611—Insulated-gate field-effect transistors [IGFET] having multiple independently-addressable gate electrodes influencing the same channel
    • H10D30/615—Insulated-gate field-effect transistors [IGFET] having multiple independently-addressable gate electrodes influencing the same channel comprising a MOS gate electrode and at least one non-MOS gate electrode
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251—Source or drain electrodes for field-effect devices
    • H10D64/257—Source or drain electrodes for field-effect devices for lateral devices wherein the source or drain electrodes are characterised by top-view geometrical layouts, e.g. interdigitated, semi-circular, annular or L-shaped electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/512—Disposition of the gate electrodes, e.g. buried gates
    • H10D64/513—Disposition of the gate electrodes, e.g. buried gates within recesses in the substrate, e.g. trench gates, groove gates or buried gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Junction Field-Effect Transistors (AREA)
JP2016237723A 2016-05-24 2016-12-07 半導体装置 Active JP6614116B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN201780031618.6A CN109155255B (zh) 2016-05-24 2017-04-06 半导体装置
US16/092,492 US10629716B2 (en) 2016-05-24 2017-04-06 Semiconductor device including switching device having four-terminal structure
PCT/JP2017/014410 WO2017203849A1 (ja) 2016-05-24 2017-04-06 半導体装置

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2016103352 2016-05-24
JP2016103352 2016-05-24

Publications (3)

Publication Number Publication Date
JP2017212425A JP2017212425A (ja) 2017-11-30
JP2017212425A5 JP2017212425A5 (OSRAM) 2018-09-06
JP6614116B2 true JP6614116B2 (ja) 2019-12-04

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US (1) US10629716B2 (OSRAM)
JP (1) JP6614116B2 (OSRAM)
CN (1) CN109155255B (OSRAM)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018230136A1 (ja) * 2017-06-13 2018-12-20 パナソニックＩｐマネジメント株式会社 窒化物半導体装置及びその製造方法
JP6769400B2 (ja) 2017-06-26 2020-10-14 株式会社デンソー 半導体装置
CN109728079A (zh) * 2018-12-04 2019-05-07 北京大学深圳研究生院 一种晶体管及其制作方法
US11476359B2 (en) * 2019-03-18 2022-10-18 Wolfspeed, Inc. Structures for reducing electron concentration and process for reducing electron concentration
CN110634943B (zh) * 2019-10-15 2021-01-01 南京大学 利用MBE再生长的横向结构GaN基JFET器件及其制备方法
JP6679036B1 (ja) * 2019-11-29 2020-04-15 株式会社パウデック ダイオード、ダイオードの製造方法および電気機器
US11380677B2 (en) * 2020-04-28 2022-07-05 Globalfoundries Singapore Pte. Ltd. Transistor devices and methods of forming a transistor device
JP2022021181A (ja) * 2020-07-21 2022-02-02 株式会社デンソー 半導体装置
CN115398647A (zh) 2021-03-11 2022-11-25 株式会社Powdec 常关型极化超结GaN系场效应晶体管和电气设备
JP6941904B1 (ja) * 2021-03-11 2021-09-29 株式会社パウデック ノーマリーオフ型分極超接合ＧａＮ系電界効果トランジスタおよび電気機器
CN118511285A (zh) * 2022-01-13 2024-08-16 住友电气工业株式会社 半导体装置
JP7768086B2 (ja) * 2022-10-07 2025-11-12 住友電気工業株式会社 半導体装置
CN117276335B (zh) * 2023-11-20 2024-02-09 南京大学 一种具有解耦合反向导通能力的增强型GaN HEMT及其制作方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007150282A (ja) * 2005-11-02 2007-06-14 Sharp Corp 電界効果トランジスタ
JP4712683B2 (ja) * 2006-12-21 2011-06-29 パナソニック株式会社 トランジスタおよびその製造方法
KR101774933B1 (ko) * 2010-03-02 2017-09-06 삼성전자 주식회사 듀얼 디플리션을 나타내는 고 전자 이동도 트랜지스터 및 그 제조방법
JP5666157B2 (ja) * 2010-03-26 2015-02-12 パナソニック株式会社 双方向スイッチ素子及びそれを用いた双方向スイッチ回路
WO2012144100A1 (ja) * 2011-04-22 2012-10-26 次世代パワーデバイス技術研究組合 窒化物系半導体装置
JP5548909B2 (ja) * 2010-04-23 2014-07-16 古河電気工業株式会社 窒化物系半導体装置
GB2482308A (en) * 2010-07-28 2012-02-01 Univ Sheffield Super junction silicon devices
US8896131B2 (en) * 2011-02-03 2014-11-25 Alpha And Omega Semiconductor Incorporated Cascode scheme for improved device switching behavior
JP2013074070A (ja) * 2011-09-27 2013-04-22 Fujitsu Ltd 半導体装置及び半導体装置の製造方法
JP5669119B1 (ja) * 2014-04-18 2015-02-12 株式会社パウデック 半導体素子、電気機器、双方向電界効果トランジスタおよび実装構造体
JP2016021530A (ja) * 2014-07-15 2016-02-04 ルネサスエレクトロニクス株式会社 半導体装置
JP5828435B1 (ja) 2015-02-03 2015-12-09 株式会社パウデック 半導体素子、電気機器、双方向電界効果トランジスタおよび実装構造体
JP6701767B2 (ja) 2015-09-22 2020-05-27 株式会社デンソー 半導体装置

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Publication number Publication date
US20190123187A1 (en) 2019-04-25
CN109155255B (zh) 2021-08-27
US10629716B2 (en) 2020-04-21
JP2017212425A (ja) 2017-11-30
CN109155255A (zh) 2019-01-04

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