JP6515934B2 - 離型フィルムおよび半導体パッケージの製造方法 - Google Patents

離型フィルムおよび半導体パッケージの製造方法 Download PDF

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Publication number
JP6515934B2
JP6515934B2 JP2016563660A JP2016563660A JP6515934B2 JP 6515934 B2 JP6515934 B2 JP 6515934B2 JP 2016563660 A JP2016563660 A JP 2016563660A JP 2016563660 A JP2016563660 A JP 2016563660A JP 6515934 B2 JP6515934 B2 JP 6515934B2
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resin
release film
mold
antistatic
release
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Japanese (ja)
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JPWO2016093178A1 (ja
Inventor
渉 笠井
渉 笠井
政己 鈴木
政己 鈴木
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AGC Inc
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Asahi Glass Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29CSHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C33/00Moulds or cores; Details thereof or accessories therefor
    • B29C33/56Coatings, e.g. enameled or galvanised; Releasing, lubricating or separating agents
    • B29C33/60Releasing, lubricating or separating agents
    • B29C33/62Releasing, lubricating or separating agents based on polymers or oligomers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape
    • H01L2924/1816Exposing the passive side of the semiconductor or solid-state body
    • H01L2924/18161Exposing the passive side of the semiconductor or solid-state body of a flip chip

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Mechanical Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Moulds For Moulding Plastics Or The Like (AREA)
  • Laminated Bodies (AREA)
  • Compositions Of Macromolecular Compounds (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP2016563660A 2014-12-09 2015-12-04 離型フィルムおよび半導体パッケージの製造方法 Active JP6515934B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2014248936 2014-12-09
JP2014248936 2014-12-09
PCT/JP2015/084204 WO2016093178A1 (ja) 2014-12-09 2015-12-04 離型フィルムおよび半導体パッケージの製造方法

Publications (2)

Publication Number Publication Date
JPWO2016093178A1 JPWO2016093178A1 (ja) 2017-09-14
JP6515934B2 true JP6515934B2 (ja) 2019-05-22

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JP2016563660A Active JP6515934B2 (ja) 2014-12-09 2015-12-04 離型フィルムおよび半導体パッケージの製造方法

Country Status (5)

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JP (1) JP6515934B2 (zh)
KR (1) KR102476428B1 (zh)
CN (1) CN107000268B (zh)
TW (1) TWI687296B (zh)
WO (1) WO2016093178A1 (zh)

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* Cited by examiner, † Cited by third party
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CN108501297A (zh) * 2017-10-14 2018-09-07 上海尚耐自动化科技有限公司 一种用于紫外光环境下光电传感器的密封外壳的制造工艺
TWI784191B (zh) * 2018-08-24 2022-11-21 日商住友電木股份有限公司 脫模薄膜及成形品之製造方法
EP3862160A4 (en) * 2018-10-04 2022-08-10 Nitto Denko Corporation REMOVABLE HEAT-RESISTANT PROTECTION SHEET AND THERMO-COMPRESSION BONDING PROCESS
KR102262695B1 (ko) * 2018-11-22 2021-06-08 주식회사 엘지화학 폴더블 백플레이트, 폴더블 백플레이트의 제조방법 및 이를 포함하는 폴더블 디스플레이 장치
KR102256783B1 (ko) 2018-11-22 2021-05-26 주식회사 엘지화학 폴더블 백플레이트 필름 및 폴더블 백플레이트 필름의 제조방법
JP7417828B2 (ja) * 2019-11-21 2024-01-19 パナソニックIpマネジメント株式会社 電子機能用成形体及びその製造方法、並びに電子機能用成形体を用いた操作装置
CN112936914A (zh) * 2019-12-11 2021-06-11 东丽先端材料研究开发(中国)有限公司 一种复合薄膜及其应用
KR20220140840A (ko) * 2020-04-02 2022-10-18 가부시끼가이샤 구레하 적층 필름, 그의 제조 방법 및 이용
KR102280585B1 (ko) 2021-01-15 2021-07-23 씰테크 주식회사 반도체 패키지용 이형 필름 및 그 제조 방법
DE112021006833T5 (de) 2021-01-18 2023-11-16 AGC Inc. Folie und Verfahren zur Herstellung eines Halbleitergehäuses
KR20220121070A (ko) * 2021-02-24 2022-08-31 주식회사 엘지화학 폴더블 백플레이트 필름의 제조 방법
WO2022180998A1 (ja) 2021-02-25 2022-09-01 Agc株式会社 フィルム及びその製造方法、並びに半導体パッケージの製造方法
CN114211668B (zh) * 2021-12-13 2024-04-26 上海空间电源研究所 一种无尾罩电连接器线缆环氧胶灌封工艺方法
CN114292480A (zh) * 2021-12-15 2022-04-08 温州大学新材料与产业技术研究院 一种具有优异抗断裂性和拉伸性etfe薄膜
WO2024048548A1 (ja) * 2022-09-01 2024-03-07 Agc株式会社 積層体、その製造方法及び半導体パッケージの製造方法

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JP2000158611A (ja) * 1998-11-26 2000-06-13 Teijin Ltd 離形フィルムならびにそれを用いた樹脂シート成形用キャリヤーフィルムおよび樹脂シート保護用フィルム
JP3970464B2 (ja) 1999-02-26 2007-09-05 株式会社ルネサステクノロジ 半導体集積回路装置の製造方法
JP2002280403A (ja) * 2001-03-19 2002-09-27 Nitto Denko Corp 半導体チップの樹脂封止方法及び半導体チップ樹脂封止用離型フィルム
JP3956673B2 (ja) * 2001-11-07 2007-08-08 東洋紡績株式会社 薄膜セラミックシート製造用離型フィルムロール
JP2005166904A (ja) * 2003-12-02 2005-06-23 Hitachi Chem Co Ltd 半導体モールド用離型シート
JP4582453B2 (ja) * 2004-06-17 2010-11-17 ナガセケムテックス株式会社 帯電防止性樹脂シート及び電子部品包装用成形体
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JP5431803B2 (ja) * 2009-06-19 2014-03-05 日東電工株式会社 モールド用離型シームレスベルト
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JP2014069385A (ja) * 2012-09-28 2014-04-21 Toray Ind Inc 耐熱離型用フィルム
JP5477878B2 (ja) 2013-01-17 2014-04-23 アピックヤマダ株式会社 トランスファモールド金型およびこれを用いたトランスファモールド装置
JP6164468B2 (ja) * 2013-05-14 2017-07-19 フジコピアン株式会社 耐熱性貼着用シート

Also Published As

Publication number Publication date
JPWO2016093178A1 (ja) 2017-09-14
WO2016093178A1 (ja) 2016-06-16
KR102476428B1 (ko) 2022-12-09
CN107000268B (zh) 2019-11-22
TWI687296B (zh) 2020-03-11
KR20170093102A (ko) 2017-08-14
TW201632332A (zh) 2016-09-16
CN107000268A (zh) 2017-08-01

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