JP6424610B2 - 半導体装置、および製造方法 - Google Patents

半導体装置、および製造方法 Download PDF

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Publication number
JP6424610B2
JP6424610B2 JP2014256186A JP2014256186A JP6424610B2 JP 6424610 B2 JP6424610 B2 JP 6424610B2 JP 2014256186 A JP2014256186 A JP 2014256186A JP 2014256186 A JP2014256186 A JP 2014256186A JP 6424610 B2 JP6424610 B2 JP 6424610B2
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Japan
Prior art keywords
metal layer
semiconductor element
semiconductor device
bump
electrode
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JP2014256186A
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English (en)
Japanese (ja)
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JP2015216350A5 (enExample
JP2015216350A (ja
Inventor
悟 脇山
悟 脇山
直樹 城
直樹 城
完 清水
完 清水
卓矢 中村
卓矢 中村
利彦 林
利彦 林
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Sony Corp
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Sony Corp
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Priority to JP2014256186A priority Critical patent/JP6424610B2/ja
Application filed by Sony Corp filed Critical Sony Corp
Priority to PCT/JP2015/002071 priority patent/WO2015162872A1/en
Priority to KR1020227006069A priority patent/KR20220030314A/ko
Priority to KR1020167021519A priority patent/KR102370046B1/ko
Priority to KR1020237005687A priority patent/KR102619737B1/ko
Priority to US15/118,575 priority patent/US10600838B2/en
Priority to CN201580006909.0A priority patent/CN105981160B/zh
Priority to CN201811352193.1A priority patent/CN109637992B/zh
Priority to TW104112256A priority patent/TWI697074B/zh
Publication of JP2015216350A publication Critical patent/JP2015216350A/ja
Publication of JP2015216350A5 publication Critical patent/JP2015216350A5/ja
Application granted granted Critical
Publication of JP6424610B2 publication Critical patent/JP6424610B2/ja
Priority to US16/503,062 priority patent/US11476291B2/en
Priority to US17/939,796 priority patent/US20230005979A1/en
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    • H01L2924/0495—5th Group
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    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12043—Photo diode

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  • Engineering & Computer Science (AREA)
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  • Power Engineering (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
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JP2014256186A JP6424610B2 (ja) 2014-04-23 2014-12-18 半導体装置、および製造方法
CN201811352193.1A CN109637992B (zh) 2014-04-23 2015-04-15 半导体装置及其制造方法
KR1020167021519A KR102370046B1 (ko) 2014-04-23 2015-04-15 반도체 장치 및 그 제조 방법
KR1020237005687A KR102619737B1 (ko) 2014-04-23 2015-04-15 반도체 장치 및 그 제조 방법
US15/118,575 US10600838B2 (en) 2014-04-23 2015-04-15 Semiconductor device and method of manufacturing thereof
CN201580006909.0A CN105981160B (zh) 2014-04-23 2015-04-15 半导体装置及其制造方法
PCT/JP2015/002071 WO2015162872A1 (en) 2014-04-23 2015-04-15 Semiconductor device and method of manufacturing thereof
KR1020227006069A KR20220030314A (ko) 2014-04-23 2015-04-15 반도체 장치 및 그 제조 방법
TW104112256A TWI697074B (zh) 2014-04-23 2015-04-16 半導體裝置及其製造方法
US16/503,062 US11476291B2 (en) 2014-04-23 2019-07-03 Semiconductor device and method of manufacturing thereof
US17/939,796 US20230005979A1 (en) 2014-04-23 2022-09-07 Semiconductor device and method of manufacturing thereof

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Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9240376B2 (en) * 2013-08-16 2016-01-19 Globalfoundries Inc. Self-aligned via fuse
JP6424610B2 (ja) * 2014-04-23 2018-11-21 ソニー株式会社 半導体装置、および製造方法
US9564418B2 (en) 2014-10-08 2017-02-07 Micron Technology, Inc. Interconnect structures with intermetallic palladium joints and associated systems and methods
KR102720747B1 (ko) * 2015-03-12 2024-10-23 소니그룹주식회사 촬상 장치, 제조 방법 및 전자 기기
US9812555B2 (en) * 2015-05-28 2017-11-07 Semiconductor Components Industries, Llc Bottom-gate thin-body transistors for stacked wafer integrated circuits
WO2017061273A1 (ja) * 2015-10-05 2017-04-13 ソニー株式会社 撮像装置、製造方法
CN106057692B (zh) * 2016-05-26 2018-08-21 河南工业大学 一种三维集成电路堆栈集成方法及三维集成电路
WO2018096917A1 (ja) * 2016-11-22 2018-05-31 千住金属工業株式会社 はんだ付け方法
JP6685470B2 (ja) * 2017-03-30 2020-04-22 三菱電機株式会社 半導体装置およびその製造方法、ならびに電力変換装置
KR102380823B1 (ko) 2017-08-16 2022-04-01 삼성전자주식회사 발열체를 포함하는 칩 구조체
WO2019066977A1 (en) 2017-09-29 2019-04-04 Intel Corporation FIRST-LEVEL THIN-LEVEL INTERCONNECTIONS DEFINED BY AUTOCATALYTIC METAL FOR LITHOGRAPHIC INTERCONNECTION HOLES
CN110660809B (zh) * 2018-06-28 2023-06-16 西部数据技术公司 包含分支存储器裸芯模块的垂直互连的半导体装置
US10622321B2 (en) * 2018-05-30 2020-04-14 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor structures and methods of forming the same
KR102830541B1 (ko) 2020-09-23 2025-07-07 삼성전자주식회사 반도체 칩의 접속 구조물 및 접속 구조물을 포함하는 반도체 패키지
US11824037B2 (en) * 2020-12-31 2023-11-21 International Business Machines Corporation Assembly of a chip to a substrate
US20230135057A1 (en) * 2021-10-28 2023-05-04 Skyworks Solutions, Inc. Dual sided molded package with varying interconnect pad sizes and uniform exposed solderable area
US20250192099A1 (en) * 2023-12-06 2025-06-12 Qualcomm Incorporated Integrated circuit(ic) package having a substrate employing reduced area, added metal pad(s) to metal interconnect(s) to reduce die-substrate clearance

Family Cites Families (49)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4617730A (en) * 1984-08-13 1986-10-21 International Business Machines Corporation Method of fabricating a chip interposer
JPH06232209A (ja) * 1993-02-02 1994-08-19 Toshiba Corp 半導体装置の製造方法
US5903058A (en) * 1996-07-17 1999-05-11 Micron Technology, Inc. Conductive bumps on die for flip chip application
US6218302B1 (en) * 1998-07-21 2001-04-17 Motorola Inc. Method for forming a semiconductor device
JP3413120B2 (ja) 1999-02-23 2003-06-03 ローム株式会社 チップ・オン・チップ構造の半導体装置
US6092714A (en) * 1999-03-16 2000-07-25 Mcms, Inc. Method of utilizing a plasma gas mixture containing argon and CF4 to clean and coat a conductor
JP3365495B2 (ja) * 1999-06-30 2003-01-14 日本電気株式会社 半導体装置およびその製造方法
US7388289B1 (en) * 1999-09-02 2008-06-17 Micron Technology, Inc. Local multilayered metallization
JP4979154B2 (ja) * 2000-06-07 2012-07-18 ルネサスエレクトロニクス株式会社 半導体装置
US20020086520A1 (en) * 2001-01-02 2002-07-04 Advanced Semiconductor Engineering Inc. Semiconductor device having bump electrode
US6815324B2 (en) * 2001-02-15 2004-11-09 Megic Corporation Reliable metal bumps on top of I/O pads after removal of test probe marks
JP2003037126A (ja) * 2001-07-24 2003-02-07 Toshiba Corp 半導体装置及びその製造方法
JP2003142485A (ja) * 2001-11-01 2003-05-16 Mitsubishi Electric Corp 半導体装置及びその製造方法
US6661098B2 (en) 2002-01-18 2003-12-09 International Business Machines Corporation High density area array solder microjoining interconnect structure and fabrication method
US6878633B2 (en) * 2002-12-23 2005-04-12 Freescale Semiconductor, Inc. Flip-chip structure and method for high quality inductors and transformers
US7427557B2 (en) * 2004-03-10 2008-09-23 Unitive International Limited Methods of forming bumps using barrier layers as etch masks
JP4882229B2 (ja) 2004-09-08 2012-02-22 株式会社デンソー 半導体装置およびその製造方法
US7741714B2 (en) * 2004-11-02 2010-06-22 Taiwan Semiconductor Manufacturing Co., Ltd. Bond pad structure with stress-buffering layer capping interconnection metal layer
JP4390206B2 (ja) 2004-11-05 2009-12-24 熊本製粉株式会社 食品組成物の製造方法、及び食品組成物
EP1732116B1 (en) 2005-06-08 2017-02-01 Imec Methods for bonding and micro-electronic devices produced according to such methods
JP2006351766A (ja) * 2005-06-15 2006-12-28 Sanyo Electric Co Ltd 半導体装置及びその製造方法
JP4384195B2 (ja) * 2007-03-22 2009-12-16 株式会社東芝 半導体装置の製造方法
US8022543B2 (en) * 2008-03-25 2011-09-20 International Business Machines Corporation Underbump metallurgy for enhanced electromigration resistance
JP5324121B2 (ja) * 2008-04-07 2013-10-23 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP5033192B2 (ja) * 2008-09-30 2012-09-26 イビデン株式会社 多層プリント配線板、及び、多層プリント配線板の製造方法
US8227295B2 (en) * 2008-10-16 2012-07-24 Texas Instruments Incorporated IC die having TSV and wafer level underfill and stacked IC devices comprising a workpiece solder connected to the TSV
JP5120342B2 (ja) * 2009-06-18 2013-01-16 ソニー株式会社 半導体パッケージの製造方法
US8183765B2 (en) * 2009-08-24 2012-05-22 Global Oled Technology Llc Controlling an electronic device using chiplets
KR101652386B1 (ko) * 2009-10-01 2016-09-12 삼성전자주식회사 집적회로 칩 및 이의 제조방법과 집적회로 칩을 구비하는 플립 칩 패키지 및 이의 제조방법
TWI395279B (zh) * 2009-12-30 2013-05-01 財團法人工業技術研究院 微凸塊結構
US9018758B2 (en) * 2010-06-02 2015-04-28 Taiwan Semiconductor Manufacturing Company, Ltd. Cu pillar bump with non-metal sidewall spacer and metal top cap
US8581418B2 (en) * 2010-07-21 2013-11-12 Taiwan Semiconductor Manufacturing Company, Ltd. Multi-die stacking using bumps with different sizes
CN101969063B (zh) * 2010-08-27 2012-07-25 友达光电股份有限公司 像素阵列基板、导电结构以及显示面板
JP2012059738A (ja) 2010-09-03 2012-03-22 Toshiba Corp 半導体装置
US8698269B2 (en) * 2011-02-28 2014-04-15 Ibiden Co., Ltd. Wiring board with built-in imaging device and method for manufacturing same
US8710612B2 (en) 2011-05-20 2014-04-29 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device having a bonding pad and shield structure of different thickness
US8531035B2 (en) * 2011-07-01 2013-09-10 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect barrier structure and method
US8963334B2 (en) * 2011-08-30 2015-02-24 Taiwan Semiconductor Manufacturing Company, Ltd. Die-to-die gap control for semiconductor structure and method
US8779539B2 (en) * 2011-09-21 2014-07-15 United Microelectronics Corporation Image sensor and method for fabricating the same
JP2013110338A (ja) * 2011-11-24 2013-06-06 Renesas Electronics Corp 半導体集積回路装置
US8642384B2 (en) * 2012-03-09 2014-02-04 Stats Chippac, Ltd. Semiconductor device and method of forming non-linear interconnect layer with extended length for joint reliability
US9142532B2 (en) * 2012-04-24 2015-09-22 Bondtech Co., Ltd. Chip-on-wafer bonding method and bonding device, and structure comprising chip and wafer
US8629524B2 (en) * 2012-04-27 2014-01-14 Taiwan Semiconductor Manufacturing Company, Ltd. Apparatus for vertically integrated backside illuminated image sensors
US9082776B2 (en) * 2012-08-24 2015-07-14 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor package having protective layer with curved surface and method of manufacturing same
JPWO2014033977A1 (ja) * 2012-08-29 2016-08-08 パナソニックＩｐマネジメント株式会社 半導体装置
US8796805B2 (en) * 2012-09-05 2014-08-05 Taiwan Semiconductor Manufacturing Company, Ltd. Multiple metal film stack in BSI chips
US9425221B2 (en) * 2014-01-31 2016-08-23 Sharp Laboratories Of America, Inc. Circuit-on-wire
JP6424610B2 (ja) * 2014-04-23 2018-11-21 ソニー株式会社 半導体装置、および製造方法
JP6639188B2 (ja) * 2015-10-21 2020-02-05 ソニーセミコンダクタソリューションズ株式会社 半導体装置、および製造方法

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US10600838B2 (en) 2020-03-24
CN105981160B (zh) 2020-07-21
US11476291B2 (en) 2022-10-18
US20230005979A1 (en) 2023-01-05
US20190326344A1 (en) 2019-10-24
TW201541558A (zh) 2015-11-01
KR102370046B1 (ko) 2022-03-04
KR20230030021A (ko) 2023-03-03
TWI697074B (zh) 2020-06-21
WO2015162872A1 (en) 2015-10-29
JP2015216350A (ja) 2015-12-03
CN109637992A (zh) 2019-04-16
CN109637992B (zh) 2020-07-21
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KR20220030314A (ko) 2022-03-10
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