CN105981160A - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

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Publication number
CN105981160A
CN105981160A CN201580006909.0A CN201580006909A CN105981160A CN 105981160 A CN105981160 A CN 105981160A CN 201580006909 A CN201580006909 A CN 201580006909A CN 105981160 A CN105981160 A CN 105981160A
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Prior art keywords
electrode
metal level
semiconductor element
metal
semiconductor device
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CN201580006909.0A
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CN105981160B (zh
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胁山悟
徐直树
清水完
林利彦
中村卓矢
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Sony Corp
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Sony Corp
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Priority to CN201811352193.1A priority Critical patent/CN109637992B/zh
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Abstract

本发明提供了一种半导体装置及其形成方法，所述半导体装置包括：具有第一电极的第一半导体元件；具有第二电极的第二半导体元件；在第二电极上形成的Sn系焊料微凸块；和与所述焊料微凸块相对的包括第一电极的凹状凸块焊盘，其中第一电极经由所述焊料微凸块和所述凹状凸块焊盘与第二电极连接。

Description

半导体装置及其制造方法
相关申请的交叉参考
本申请要求于2014年4月23日提交的日本在先专利申请JP2014-088804和于2014年12月18日提交的日本在先专利申请JP2014-256186的权益，其全部内容以引用的方式并入本文。
技术领域
本公开涉及一种半导体装置及其制造方法，具体地，涉及一种其中堆叠的半导体元件的各电极经由Sn系焊接彼此电连接的半导体装置及其制造方法。
背景技术
在现有技术中，在经由半导体元件的堆叠构成的半导体装置的制造过程中，使用Sn系焊料(SnAg等)微凸块的形成技术来连接堆叠的半导体元件的各电极。
图1是示意性示出在现有技术中的用来堆叠半导体元件的Sn系焊料微凸块的形成技术的图。
如图1所示，在第一半导体元件1(即，一个半导体元件)上的Al PAD2的一部分露出，并且在其上形成有作为阻挡层金属3的Ni等。在第二半导体元件4(即，另一个半导体元件)上形成有Sn系焊料微凸块6，并且阻挡层金属3和Sn系焊料微凸块6经由甲酸还原彼此扩散连接。
图2是示出了可以从Sn和阻挡层金属获得的各种金属随时间变化的理论扩散距离(在200℃下)的图。如从图2明显看出的，在其中经由上述甲酸还原进行扩散连接的情况下，当考虑Sn系焊料的扩散性时，必须形成厚度为微米数量级(具体地，厚度为3微米以上)的阻挡层金属3。
然而，在半导体装置的制造过程中的晶片工艺中难以使厚度为微米数量级的阻挡层金属3流动。
在PTL 1中公开的情况下，作为芯片接合技术，Ti用作Sn系焊料的阻挡层金属，并且使用溅射技术形成在晶片工艺中可以流动的厚度大约为200纳米的Ti。
[引用文献列表]
[专利文献]
[PTL 1]
日本未审查专利申请公开No.2006-108604
发明内容
[技术问题]
然而，在PTL 1所公开的方法中，当半导体元件经由芯片接合技术仅物理地彼此连接并且经历由申请人进行的高温放置试验时，Sn系焊料和Ti之间的边界的电阻由于合金生长或氧化等而增大。因此，根据PTL1所公开的方法，堆叠的半导体元件的各电极可以物理地彼此连接；然而，堆叠的半导体元件的各电极可能会未彼此电连接。
鉴于上述问题完成了本公开，并且根据本公开，堆叠的半导体元件的各电极可以电连接。
[问题的解决方案]
根据本公开的实施方案，提供了一种半导体装置，包括：具有第一电极的第一半导体元件；具有第二电极的第二半导体元件；在第二电极上形成的Sn系焊料微凸块；和在第一电极上形成的与所述焊料微凸块相对的凹状凸块焊盘，其中第一电极经由所述焊料微凸块和所述凹状凸块焊盘与第二电极连接。
可以在所述凸块焊盘上顺次形成有扩散到所述微凸块中并且离所述微凸块近的第三金属层和由钒族金属制成的第二金属层。
第一半导体元件上可以具有直径彼此不同的多个凸块焊盘。
所述凸块焊盘的直径可以取决于与其连接的各电极的用途而不同。
第二半导体元件的微凸块的直径可以与对应的第一半导体元件的凸块焊盘的直径相对应。
可以在所述凸块焊盘上顺次形成有离所述微凸块近的第三金属层、第二金属层和第一金属层，第一金属层由第二金属层中所使用的钒族金属的氮化物膜形成。
第二金属层可以具有30纳米以上的平均厚度。
第一金属层可以具有10纳米以上的平均厚度。
第二金属层可以由Ta制成，并且第一金属层由TaN制成。
第三金属层可以由Cu、Co、Ni、Pd、Au或Pt制成。
所述凸块焊盘可以通过从第一半导体元件的表面到第一半导体元件内的贯通电极设置的开口部来形成。
所述凸块焊盘可以通过从第一半导体元件的表面到第一半导体元件内的金属配线设置的开口部来形成。
所述半导体装置可以是其中相当于第二半导体元件的逻辑芯片与相当于第一半导体元件的像素基板CoW连接的堆叠型CMOS图像传感器。
根据本公开的第二实施方案，提供了一种半导体装置的制造方法，所述半导体装置包括与具有第二电极的第二半导体元件堆叠的具有第一电极的第一半导体元件，所述方法包括：在第二电极上形成Sn系焊料微凸块；和在第一电极上形成与所述焊料微凸块相对的凹状凸块焊盘，其中第一电极经由所述焊料微凸块和所述凹状凸块焊盘与第二电极连接。
在所述凸块焊盘的形成过程中，可以在经由所述微凸块与第二半导体元件的电极连接的作为相对的半导体元件中的另一个的第一半导体元件的电极上形成由钒族金属制成的第二金属层，可以在第二金属层上形成扩散到所述微凸块中的第三金属层，并且可以使所述微凸块与第三金属层接触，以及可以使所述微凸块和第三金属层经受与还原气氛相关联的热处理，从而可以使第三金属层和在所述微凸块的表面上的氧化膜还原，并且由于第三金属层扩散到所述微凸块中，而可以使得所述微凸块和第二金属层彼此接触，并且可以使得第一半导体元件和第二半导体元件的各自电极彼此电连接。
在所述凸块焊盘的形成过程中，可以在第一半导体元件的第三金属层上形成钝化层，并且可以经由所述钝化层的蚀刻而露出第三金属层来设置开口部。
在所述凸块焊盘的形成过程中，在形成第二金属层之前，可以在经由所述微凸块与第二半导体元件连接的作为所述相对的半导体元件中的另一个的第一半导体元件的电极上形成第一金属层，并且第一金属层可以由第二金属层中所使用的钒族金属的氮化物膜形成。
在所述凸块焊盘的形成过程中，可以通过设置从第一半导体元件的表面到第一半导体元件内的贯通电极的开口部来形成所述凸块焊盘。
在所述凸块焊盘的形成过程中，可以通过设置从第一半导体元件的表面到第一半导体元件内的金属配线的开口部来形成所述凸块焊盘。
[有益效果]
根据本公开的第一实施方案，可以获得其中第一半导体元件和第二半导体元件的各自电极彼此电连接的半导体装置。
根据本公开的第二实施方案，可以制造其中第一半导体元件和第二半导体元件的各自电极彼此电连接的半导体装置。
附图说明
图1是示意性示出使用Sn系焊料微凸块来连接堆叠的半导体元件的各电极的技术的图。
图2是示出可以从Sn和阻挡层金属获得的各种金属随时间变化的理论扩散距离的图。
图3是示出本公开适用的半导体装置的构成例的断面图。
图4是示出图3所示的半导体装置的制造方法的流程图。
图5A是半导体装置的示出其制造过程的断面图。
图5B是半导体装置的示出其制造过程的断面图。
图5C是半导体装置的示出其制造过程的断面图。
图5D是半导体装置的示出其制造过程的断面图。
图5E是半导体装置的示出其制造过程的断面图。
图6A是半导体装置的示出其制造过程的断面图。
图6B是半导体装置的示出其制造过程的断面图。
图6C是半导体装置的示出其制造过程的断面图。
图7是Sn和Ta之间的相关图。
图8是示出在125℃下的放置试验中电阻值变化的图。
图9是示出第一至第三金属层中各层的材料和厚度的例子的表。
图10是示出本公开适用的半导体装置的第一变形例的断面图。
图11是示出本公开适用的半导体装置的第二变形例的断面图。
图12是示出凸块容量与凸块焊盘和微凸块的直径之间的关系的图。
图13是示出电阻值与凸块焊盘和微凸块的直径之间的关系的图。
图14是示出半导体装置的第二变形例的应用例的框图。
图15是示出本公开的半导体装置当适用于堆叠型CMOS图像传感器时彼此堆叠之前的状态的断面图。
图16是示出本公开的半导体装置当适用于堆叠型CMOS图像传感器时彼此堆叠之后的状态的断面图。
图17是示出其中I/O与在逻辑芯片上形成的WB焊盘连接的状态的断面图。
图18是示出与凸块焊盘的形成相关的变形例的断面图。
图19是示出与凸块焊盘的形成相关的变形例的断面图。
图20是示出与凸块焊盘的形成相关的变形例的断面图。
具体实施方式
在下文中，参照附图详细说明用于实现本公开的最优选的形式(在下文中，被称作实施方案)。
<半导体装置的构成例>
图3是示出作为本公开实施方案的半导体装置的构成例的断面图。在彼此堆叠并且经由Sn系焊料彼此电连接的第一半导体元件和第二半导体元件中，图3仅示出了其上没有形成微凸块的第一半导体元件。
Sn系焊料材料可以是SnAg系、SnBi系、SnCu系、SnIn系或SnAgCu系焊料材料等。
如图3所示，在第一半导体元件10上设置有作为电极的Al PAD 11，Al PAD 11的一部分变为用于连接第一半导体元件10和第二半导体元件的微凸块的开口部21(参照图5A～5E)，并且在开口部21上顺次形成有第一金属层13、第二金属层14和第三金属层15。在开口部21之外的部分上形成有SiO2层12，并且在SiO2层上形成有SiN层16。
充当阻挡层金属的第一金属层13由第二金属层14中使用的金属的氮化物膜形成。例如，在图3所示的例子中使用TaN。第一金属层13具有大约10纳米以上的平均厚度。因此，特别地，在通过其可以降低颗粒风险的晶片工艺中可以形成第一金属层13。
由于设置有第一金属层(阻挡层金属)13，所以可以防止Al PAD 11与第二金属层14之间以及Al PAD 11与可能由于第二半导体元件的Sn系焊料微凸块和第二金属层14之间的反应而形成的合金层之间的反应。因此，可以预见半导体装置的可靠性和电气特性的提高。可以不设置第一金属层13。
例如，在第二金属层14中采用相对于Sn系焊料具有相关性和低扩散性的Ta。第二金属层14具有大约30纳米以上的平均厚度。因此，特别地，在通过其可以降低颗粒风险的晶片工艺中可以形成第二金属层14。在第二金属层14中可以使用Ta之外的相对于Sn系焊料具有低扩散性的钒族金属(V和Nb等)。
例如，在第三金属层15中使用相对于Sn具有高扩散性的Cu，并且第二金属层14的表面氧化膜可以使用免清洗焊剂和还原性气体等来还原。将第三金属层15的平均厚度设定为大约80纳米以上以防止第二金属层14的氧化。在第三金属层15中可以使用Cu之外的Co、Ni、Pd、Au和Pt等。
由于采用上述构成，所以即使当将很有可能氧化并且不太可能被还原的Ta和Ti等用作第二金属层14的材料时，也可以容易使Sn系焊料和第二金属层14彼此接触(反应)。由于在第二金属层14中使用Ta，所以可以提高半导体装置的可靠性和电气特性。
<制造装置通过其制造半导体装置的制造方法>
接着，参照图4～6C说明图3所示的半导体装置的制造方法。
图4是示出图3所示的半导体装置的制造方法的流程图。图5A～6C是半导体装置的示出其制造过程的断面图。
如图5A所示，在步骤S1中，在其上设置有作为电极的Al PAD 11的第一半导体元件10上形成SiO2层12。随后，在SiO2层12的表面上，取决于后述的开口部21的位置和直径，施加用于保护开口部21之外的部分的抗蚀剂图案(未示出)。另外，如图5B所示，通过经由干法蚀刻削掉SiO2层12直到Al PAD 11露出来设置开口部21。
如图5C所示，在步骤S2中，经由溅射法形成第一金属层(TaN)13、第二金属层(Ta)14和第三金属层(Cu)15。随后，如图5D所示，在步骤S3中，使用与第三金属层15相同的材料(在这种情况下为Cu)使第三金属层15经受镀覆处理，从而使第三金属层15的厚度增大，并且开口部21的凹部用第三金属层15填埋。
如图5E所示，在步骤S4中，经由化学机械抛光(CMP)将开口部21之外的第三金属层15和第二金属层14除去。在步骤S5中，在整个表面上形成作为钝化层的SiN层16，并且向SiN层16的表面施加抗蚀剂图案(未示出)。另外，如图6A所示，经由干法蚀刻削掉SiN层16，直到开口部21的第三金属层15露出。因此，开口部21具有凹状结构，从而容易使开口部21的位置与在第二半导体元件23上形成的Sn系焊料微凸块24的位置对准。在下文中，与微凸块24相对的开口部21也被称作凸块焊盘21。
如图6B所示，在步骤S6中，使在第二半导体元件23上的微凸块24和凸块焊盘21的第三金属层15彼此接触，并且使其经受与诸如甲酸气氛等还原气氛相关联的热处理，从而使第三金属层15和在Sn系焊料微凸块24的表面上的氧化膜还原。如图6C所示，其后，在步骤S7中，将第三金属层15扩散到Sn系焊料中，从而使Sn系焊料和第二金属层14彼此接触(反应)，并且在第二半导体元件23的电极和作为第一半导体元件10的电极的Al PAD 11之间建立连接。以上说明了制造方法。
<第二金属层14和微凸块24之间的相关图>
图7是第二金属层14中使用的Ta和Sn系焊料微凸块24中所含的Sn之间的相关图。如图7所示，当在250℃的温度下建立凸块连接时，推测在Ta和Sn之间的边界处形成Ta3Sn的合金或Ta2Sn3的合金。
<Kelvin电阻相对于高温放置时间的测量结果>
图8是示出当在第一金属层13、第二金属层14和第三金属层15中分别使用TaN、Ta和Cu并且第二金属层14与Sn系焊料微凸块24连接时Kelvin电阻相对于125℃下高温放置时间的的测量结果的图。如图8所示，即使在168小时过去之后电阻值也没有发生变化。因此，可以理解的是第一半导体元件10和第二半导体元件23的各自电极之间的电连接即使随着时间经过也得以维持。
<关于第一金属层13、第二金属层14和第三金属层15的材料和厚度>
接着，图9是示出当第二金属层14的厚度与第三金属层15的材料和厚度改变时第一至第五例和比较例(PTL 1中所公开的构成)的评价的表。
在第一例中，在厚度为15纳米的第一金属层13、厚度为100纳米的第二金属层14和厚度为80纳米的第三金属层15中分别使用TaN、Ta和Cu。在第二例中，在厚度为15纳米的第一金属层13、厚度为100纳米的第二金属层14和厚度为100纳米的第三金属层15中分别使用TaN、Ta和Co。在第三例中，在厚度为15纳米的第一金属层13、厚度为100纳米的第二金属层14和厚度为360纳米的第三金属层15中分别使用TaN、Ta和Cu。在第四例中，在厚度为15纳米的第一金属层13、厚度为50纳米的第二金属层14和厚度为80纳米的第三金属层15中分别使用TaN、Ta和Cu。在第五例中，在厚度为15纳米的第一金属层13、厚度为30纳米的第二金属层14和厚度为80纳米的第三金属层15中分别使用TaN、Ta和Cu。在第一至第五例中的任一个中，金属层之间的连接性和高温放置试验的结果没有问题，并且在第一半导体元件10和第二半导体元件23的各自电极之间建立物理连接和电连接。在比较例中，在电极之间建立了物理连接；然而，电阻值随着时间增大，并且在它们之间没有维持电连接。
<半导体装置的第一变形例>
图10是示出根据本公开实施方案的半导体装置的第一变形例的断面图。第一变形例具有其中从图3所示的构成省略第一金属层13的构成。因此，可以减少工艺节拍时间和成本。
<半导体装置的第二变形例>
接着，图11是示出根据本公开实施方案的半导体装置的第二变形例的断面图。
在第二变形例的构成中，在第一半导体元件10上的凸块焊盘21的直径取决于与凸块焊盘21连接的电极(电线)的使用而改变。在第一半导体元件10上设置有两个凸块焊盘21，并且凸块焊盘21-2形成为具有比凸块焊盘21-1大的直径。
通过改变在上述制造处理的步骤S1中施加到SiO2层12上的抗蚀剂图案以及在步骤S5中施加到SiN层16上的抗蚀剂图案可以容易改变在同一基板(在这种情况下为第一半导体元件10)上的多个凸块焊盘21的直径。
另一方面，第二半导体元件的Sn系焊料微凸块24的直径改变成与对应凸块焊盘21的直径相对应。
<相对于凸块焊盘21和微凸块24的直径变化的凸块容量的变化>
图12是示出相对于凸块焊盘21(开口部)和微凸块的直径变化的凸块容量的变化的图。
如图12所示，与当凸块焊盘21和微凸块24的直径大时相比，当凸块焊盘21和微凸块24的直径小时，凸块的容量要小。因此，当经由具有小直径的凸块焊盘21和具有小直径的微凸块24建立信号线的连接时，可以预见电气通信信号的信号特性提高。另外，此时可以容易进行线路连接。
<相对于凸块焊盘21和微凸块24的直径变化的电阻值的变化>
图13是示出相对于凸块焊盘21(开口部)和微凸块24的直径变化的电阻值的变化的图。
如图13所示，随着凸块焊盘21和微凸块24的直径进一步增大，电阻值进一步减小。因此，当经由具有大直径的凸块焊盘21和具有大直径的微凸块24建立信号线的连接时，可以防止诸如IR降等电力供给相关的缺陷的发生。
<半导体装置的第二变形例的应用例>
接着，图14示出了图11所示的第二构成例的应用例。
在该应用例中，电源线35连接第一半导体元件10的电源单元31和第二半导体元件23的电源单元33，并且经由具有大直径的凸块焊盘21-2和具有大直径的微凸块24建立电源线35的连接。信号线36和37连接第一半导体元件10的信号处理单元32和第二半导体元件23的信号处理单元34，并且经由具有小直径的凸块焊盘21-1和具有小直径的微凸块24建立信号线36和37的连接。
通过利用图14所示的应用例的构成，可以提高第一半导体元件10和第二半导体元件23之间的电气通信信号的信号特性，并且可以防止诸如IR降等电力供给相关的缺陷的发生。
<半导体装置的应用例>
接着，说明其中本公开的半导体装置应用于堆叠型CMOS图像传感器(在下文中，被称作堆叠型CIS)的构成例。
图15示出了本公开的半导体装置在应用于堆叠型CIS时彼此堆叠之前的状态，图16示出了半导体彼此堆叠之后的状态。
即，在堆叠型CIS的构成中，在设置有用于进行光电转换的像素单元的像素基板51上经由晶片上的芯片(CoW)连接堆叠用于处理从像素基板51输出的像素信号的逻辑芯片52。
像素基板51相当于第一半导体元件10，并且在像素基板51的光入射面上形成有与逻辑芯片52的微凸块24连接的凸块焊盘21。另一方面，逻辑芯片52相当于第二半导体元件23，并且在逻辑芯片52的与像素基板51连接的表面上形成有微凸块24。
像素基板51和逻辑芯片52在凸块焊盘21和微凸块24以彼此接触的方式彼此堆叠的同时经受热处理，从而使像素基板51和逻辑芯片52彼此电连接。如图17所示，在逻辑芯片52的与像素基板51连接的表面的相对侧的另一表面上形成有WB焊盘71，并且I/O 72与WB焊盘71连接。
如图17所示，由于本公开的半导体装置适用于堆叠型CMOS图像传感器，所以可以防止当在像素基板51上也形成微焊盘时可能发生的诸如像素单元的灰尘污染等损坏的发生。另外，当使逻辑芯片52和像素基板51彼此堆叠时可以实现低堆叠高度，并且可以防止CF清洁中的变化。
<与凸块焊盘的形成相关的变形例>
接着，说明与凸块焊盘的形成相关的变形例。
在图18所示的变形例中，当在像素基板51内形成贯通电极81时，在贯通电极81的位置设置开口部21，并且将贯通电极81用作与逻辑芯片52的微凸块24相对应的凸块焊盘。由于将贯通电极81用作凸块焊盘，所以可以省略第一金属层13至第三金属层15的形成。
在图19和图20所示的各变形例中，省略了像素基板51(第一半导体元件10)和Al PAD 11，开口部21形成为到达像素基板51内部的金属配线(Cu配线)91，并且将像素基板内部的金属配线91用作与逻辑芯片52的微凸块24相对应的凸块焊盘。
由于省略了Al PAD 11并且将像素基板51内部的金属配线91用作凸块焊盘，所以可以在定制加工中获得更小的清洁变化，并且可以实现芯片收缩。另外，可以实现逻辑芯片52的低堆叠高度。
本公开的半导体装置可以适用于堆叠型CIS之外的其中堆叠的半导体元件的各电极彼此连接的各种类型的电子装置。
本公开不限于上述实施方案，并且可以在不脱离本公开精神的情况下进行各种修改。
本公开可以具有以下构成。
(1)一种经由半导体元件的堆叠构成并且其中相对的半导体元件的各电极彼此电连接的半导体装置，其中在作为所述相对的半导体元件中的一个的第二半导体元件的电极上形成有Sn系焊料微凸块，以及其中在经由所述微凸块与第二半导体元件的电极连接的作为所述相对的半导体元件中的另一个的第一半导体元件的电极上形成有与所述微凸块相对的凹状凸块焊盘。
(2)在(1)中公开的所述半导体装置中，在所述凸块焊盘上顺次形成有扩散到所述微凸块中并且离所述微凸块近的第三金属层和由钒族金属制成的第二金属层。
(3)在(1)或(2)中公开的所述半导体装置中，第一半导体元件上具有直径彼此不同的多个凸块焊盘。
(4)在(1)～(3)中任一项公开的所述半导体装置中，所述凸块焊盘的直径取决于与其连接的各电极的用途而不同。
(5)在(1)～(4)中任一项公开的所述半导体装置中，第二半导体元件的微凸块的直径与对应的第一半导体元件的凸块焊盘的直径相对应。
(6)在(1)～(5)中任一项公开的所述半导体装置中，在所述凸块焊盘上顺次形成有离所述微凸块近的第三金属层、第二金属层和第一金属层，第一金属层由第二金属层中所使用的钒族金属的氮化物膜形成。
(7)在(1)～(6)中任一项公开的所述半导体装置中，第二金属层具有30纳米以上的平均厚度。
(8)在(1)～(6)中任一项公开的所述半导体装置中，第一金属层具有10纳米以上的平均厚度。
(9)在(1)～(6)中任一项公开的所述半导体装置中，第二金属层由Ta制成，并且第一金属层由TaN制成。
(10)在(1)～(6)中任一项公开的所述半导体装置中，第三金属层由Cu、Co、Ni、Pd、Au或Pt制成。
(11)在(1)中公开的所述半导体装置中，所述凸块焊盘通过从第一半导体元件的表面到第一半导体元件内的贯通电极设置的开口部来形成。
(12)在(1)中公开的所述半导体装置中，所述凸块焊盘通过从第一半导体元件的表面到第一半导体元件内的金属配线设置的开口部来形成。
(13)在(1)中公开的所述半导体装置中，所述半导体装置是其中相当于第二半导体元件的逻辑芯片与相当于第一半导体元件的像素基板CoW连接的堆叠型CMOS图像传感器。
(14)一种制造装置通过其制造经由半导体元件的堆叠构成以及其中相对的半导体元件的各电极彼此电连接的半导体装置的制造方法，所述方法包括在作为所述相对的半导体元件中的一个的第二半导体元件的电极上形成Sn系焊料微凸块的微凸块形成步骤和在经由所述微凸块与第二半导体元件的电极连接的作为所述相对的半导体元件中的另一个的第一半导体元件的电极上形成与所述微凸块相对的凹状凸块焊盘的凸块焊盘形成步骤。
(15)在(14)中公开的所述制造方法中，在所述凸块焊盘形成步骤中，在经由所述微凸块与第二半导体元件的电极连接的作为所述相对的半导体元件中的另一个的第一半导体元件的电极上形成由钒族金属制成的第二金属层，在第二金属层上形成扩散到所述微凸块中的第三金属层，并且使所述微凸块与第三金属层接触，以及使所述微凸块和第三金属层经受与还原气氛相关联的热处理，从而使第三金属层和在所述微凸块的表面上的氧化膜还原，并且由于第三金属层扩散到所述微凸块中，而使得所述微凸块和第二金属层彼此接触，并且使得第一半导体元件和第二半导体元件的各自电极彼此电连接。
(16)在(15)中公开的所述制造方法中，在所述凸块焊盘形成步骤中，在第一半导体元件的第三金属层上形成钝化层，并且经由所述钝化层的蚀刻而露出第三金属层来设置开口部。
(17)在(15)中公开的所述制造方法中，在所述凸块焊盘形成步骤中，在形成第二金属层之前，在经由所述微凸块与第二半导体元件连接的作为所述相对的半导体元件中的另一个的第一半导体元件的电极上形成第一金属层，并且第一金属层由第二金属层中所使用的钒族金属的氮化物膜形成。
(18)在(14)中公开的所述制造方法中，在所述凸块焊盘形成步骤中，通过设置从第一半导体元件的表面到第一半导体元件内的贯通电极的开口部来形成所述凸块焊盘。
(19)在(14)中公开的所述制造方法中，在所述凸块焊盘形成步骤中，通过设置从第一半导体元件的表面到第一半导体元件内的金属配线的开口部来形成所述凸块焊盘。
(20)一种半导体装置，包括：具有第一电极的第一半导体元件；具有第二电极的第二半导体元件；在第二电极上形成的Sn系焊料微凸块；和在第一电极上形成的与所述焊料微凸块相对的凹状凸块焊盘，其中第一电极经由所述焊料微凸块和所述凹状凸块焊盘与第二电极连接。
(21)根据(20)所述的半导体装置，还包括在所述凹状凸块焊盘上顺次形成的第二金属层和第三金属层，其中第三金属层扩散到所述焊料微凸块中，以及其中第二金属层由钒族金属制成。
(22)根据(20)～(21)中任一项所述的半导体装置，其中第一半导体元件上具有直径彼此不同的多个凹状凸块焊盘。
(23)根据(20)～(22)中任一项所述的半导体装置，其中所述凹状凸块焊盘的直径取决于与其连接的各电极的用途而不同。
(24)根据(20)～(23)中任一项所述的半导体装置，其中所述焊料微凸块的直径与所述凹状凸块焊盘的直径相对应。
(25)根据(20)～(21)中任一项所述的半导体装置，还包括与第二金属层和第三金属层一起在所述凹状凸块焊盘上顺次形成的第一金属层，其中第三金属层离所述焊料微凸块最近，以及其中第一金属层是第二金属层中所使用的钒族金属的氮化物膜。
(26)根据(20)～(25)中任一项所述的半导体装置，其中第二金属层具有30纳米以上的平均厚度。
(27)根据(20)～(26)中任一项所述的半导体装置，其中第一金属层具有10纳米以上的平均厚度。
(28)根据(20)～(27)中任一项所述的半导体装置，其中第二金属层是Ta，并且第一金属层是TaN。
(29)根据(20)～(28)中任一项所述的半导体装置，其中第三金属层是Cu、Co、Ni、Pd、Au和Pt中的一种。
(30)根据(20)～(29)中任一项所述的半导体装置，其中第一电极是贯通电极。
(31)根据(20)～(30)中任一项所述的半导体装置，还包括：从第一半导体元件的表面延伸到第一半导体元件内的金属配线的开口部，其中所述开口部形成所述凹状凸块焊盘。
(32)根据(20)～(31)中任一项所述的半导体装置，其中所述半导体装置是包括相当于第二半导体元件的逻辑芯片的堆叠型CMOS图像传感器，所述逻辑芯片与相当于第一半导体元件的像素基板CoW连接。
(33)一种半导体装置的制造方法，所述半导体装置包括与具有第二电极的第二半导体元件堆叠的具有第一电极的第一半导体元件，所述方法包括：在第二电极上形成Sn系焊料微凸块；和在第一电极上形成与所述焊料微凸块相对的凹状凸块焊盘，其中第一电极经由所述焊料微凸块和所述凹状凸块焊盘与第二电极连接。
(34)根据(33)所述的制造方法，其中在所述凹状凸块焊盘的形成过程中，在第一电极上形成由所述钒族金属制成的第二金属层并且在第二金属层上形成第三金属层，其中第三金属层扩散到所述焊料微凸块中，并且使所述焊料微凸块和第三金属层经受具有还原气氛的热处理，从而使第三金属层和在所述焊料微凸块的表面上的氧化膜还原，并且由于第三金属层扩散到所述焊料微凸块中，而使得所述焊料微凸块和第二金属层彼此接触，并且使得第一和第二电极彼此电连接。
(35)根据(33)～(34)中任一项所述的制造方法，其中在所述凹状凸块焊盘的形成过程中，在第一半导体元件的第三金属层上形成钝化层，并且经由所述钝化层的蚀刻而露出第三金属层来形成开口部。
(36)根据(33)～(35)中任一项所述的制造方法，其中在所述凹状凸块焊盘的形成过程中，在形成第二金属层之前，在第一电极上形成第一金属层，以及其中第一电极经由所述焊料微凸块与第二半导体元件连接，并且第一金属层是第二金属层中所使用的钒族金属的氮化物膜。
(37)根据(33)～(36)中任一项所述的制造方法，其中第一电极是贯通电极。
(38)根据(33)～(37)中任一项所述的制造方法，其中在所述凹状凸块焊盘的形成过程中，通过设置从第一半导体元件的表面到第一半导体元件内的金属配线的开口部来形成所述凹状凸块焊盘。
(39)根据(33)～(38)中任一项所述的制造方法，其中所述半导体装置是包括相当于第二半导体元件的逻辑芯片和相当于第一半导体元件的像素基板的堆叠型CMOS图像传感器，和其中所述逻辑芯片和所述像素基板在所述凹状凸块焊盘和所述焊料微凸块接触的同时经受热处理。
本领域技术人员应当理解，依据设计要求和其他因素，可以在本发明所附的权利要求书或其等同物的范围内进行各种修改、组合、次组合以及改变。
[附图标记列表]
10 第一半导体元件
11 Al PAD
12 SiO2层
13 第一金属层
14 第二金属层
15 第三金属层
16 SiN层
21 开口部(凸块焊盘)
23 第二半导体元件
24 微凸块
31 电源单元
32 信号处理单元
33 电源单元
34 信号处理单元
35 电源线
36，37 信号线
51 像素基板
52 逻辑芯片
81 贯通电极
91 Cu配线

Claims (20)

1.一种半导体装置，包括：
具有第一电极的第一半导体元件；
具有第二电极的第二半导体元件；
在第二电极上形成的Sn系焊料微凸块；和
在第一电极上形成的与所述焊料微凸块相对的凹状凸块焊盘，
其中第一电极经由所述焊料微凸块和所述凹状凸块焊盘与第二电极连接。
2.根据权利要求1所述的半导体装置，还包括在所述凹状凸块焊盘上顺次形成的第二金属层和第三金属层，
其中第三金属层扩散到所述焊料微凸块中，以及
其中第二金属层由钒族金属制成。
3.根据权利要求2所述的半导体装置，其中第一半导体元件上具有直径彼此不同的多个凹状凸块焊盘。
4.根据权利要求3所述的半导体装置，其中所述凹状凸块焊盘的直径取决于与其连接的各电极的用途而不同。
5.根据权利要求2所述的半导体装置，其中所述焊料微凸块的直径与所述凹状凸块焊盘的直径相对应。
6.根据权利要求2所述的半导体装置，还包括与第二金属层和第三金属层一起在所述凹状凸块焊盘上顺次形成的第一金属层，其中第三金属层离所述焊料微凸块最近，以及其中第一金属层是第二金属层中所使用的钒族金属的氮化物膜。
7.根据权利要求6所述的半导体装置，其中第二金属层具有30纳米以上的平均厚度。
8.根据权利要求6所述的半导体装置，其中第一金属层具有10纳米以上的平均厚度。
9.根据权利要求6所述的半导体装置，其中第二金属层是Ta，并且第一金属层是TaN。
10.根据权利要求6所述的半导体装置，其中第三金属层是Cu、Co、Ni、Pd、Au和Pt中的一种。
11.根据权利要求1所述的半导体装置，其中第一电极是贯通电极。
12.根据权利要求1所述的半导体装置，还包括：
从第一半导体元件的表面延伸到第一半导体元件内的金属配线的开口部，其中所述开口部形成所述凹状凸块焊盘。
13.根据权利要求1所述的半导体装置，其中所述半导体装置是包括相当于第二半导体元件的逻辑芯片的堆叠型CMOS图像传感器，所述逻辑芯片与相当于第一半导体元件的像素基板CoW连接。
14.一种半导体装置的制造方法，所述半导体装置包括与具有第二电极的第二半导体元件堆叠的具有第一电极的第一半导体元件，所述方法包括：
在第二电极上形成Sn系焊料微凸块；和
在第一电极上形成与所述焊料微凸块相对的凹状凸块焊盘，
其中第一电极经由所述焊料微凸块和所述凹状凸块焊盘与第二电极连接。
15.根据权利要求14所述的制造方法，其中在所述凹状凸块焊盘的形成过程中，在第一电极上形成由钒族金属制成的第二金属层并且在第二金属层上形成第三金属层，其中第三金属层扩散到所述焊料微凸块中，并且使所述焊料微凸块和第三金属层经受具有还原气氛的热处理，从而使第三金属层和在所述焊料微凸块的表面上的氧化膜还原，并且由于第三金属层扩散到所述焊料微凸块中，而使得所述焊料微凸块和第二金属层彼此接触，并且使得第一和第二电极彼此电连接。
16.根据权利要求15所述的制造方法，其中在所述凹状凸块焊盘的形成过程中，在第一半导体元件的第三金属层上形成钝化层，并且经由所述钝化层的蚀刻而露出第三金属层来形成开口部。
17.根据权利要求15所述的制造方法，其中在所述凹状凸块焊盘的形成过程中，在形成第二金属层之前，在第一电极上形成第一金属层，以及其中第一电极经由所述焊料微凸块与第二半导体元件连接，并且第一金属层是第二金属层中所使用的钒族金属的氮化物膜。
18.根据权利要求14所述的制造方法，其中第一电极是贯通电极。
19.根据权利要求14所述的制造方法，其中在所述凹状凸块焊盘的形成过程中，通过设置从第一半导体元件的表面到第一半导体元件内的金属配线的开口部来形成所述凹状凸块焊盘。
20.根据权利要求14所述的制造方法，其中所述半导体装置是包括相当于第二半导体元件的逻辑芯片和相当于第一半导体元件的像素基板的堆叠型CMOS图像传感器，以及其中所述逻辑芯片和所述像素基板在所述凹状凸块焊盘和所述焊料微凸块接触的同时经受热处理。
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