JP6325975B2 - リードフレーム、半導体装置 - Google Patents
リードフレーム、半導体装置 Download PDFInfo
- Publication number
- JP6325975B2 JP6325975B2 JP2014257463A JP2014257463A JP6325975B2 JP 6325975 B2 JP6325975 B2 JP 6325975B2 JP 2014257463 A JP2014257463 A JP 2014257463A JP 2014257463 A JP2014257463 A JP 2014257463A JP 6325975 B2 JP6325975 B2 JP 6325975B2
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- Prior art keywords
- lead
- semiconductor device
- frame
- resin
- terminal
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49548—Cross section geometry
- H01L23/49551—Cross section geometry characterised by bent parts
- H01L23/49555—Cross section geometry characterised by bent parts the bent parts being the outer leads
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49517—Additional leads
- H01L23/4952—Additional leads the additional leads being a bump or a wire
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- H01L23/495—Lead-frames or other flat leads
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- H01L2924/0001—Technical content checked by a classifier
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- H01L2924/18301—Connection portion, e.g. seal being an anchoring portion, i.e. mechanical interlocking between the encapsulation resin and another package part
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Geometry (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Wire Bonding (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2014257463A JP6325975B2 (ja) | 2014-12-19 | 2014-12-19 | リードフレーム、半導体装置 |
| KR1020150164526A KR102452097B1 (ko) | 2014-12-19 | 2015-11-24 | 리드 프레임 및 반도체 장치 |
| US14/955,117 US9698084B2 (en) | 2014-12-19 | 2015-12-01 | Semiconductor device and lead frame having two leads welded together |
| TW104140272A TWI668826B (zh) | 2014-12-19 | 2015-12-02 | Lead frame, semiconductor device |
| CN201510882130.7A CN105720034B (zh) | 2014-12-19 | 2015-12-03 | 引线框架、半导体装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2014257463A JP6325975B2 (ja) | 2014-12-19 | 2014-12-19 | リードフレーム、半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2016119366A JP2016119366A (ja) | 2016-06-30 |
| JP2016119366A5 JP2016119366A5 (enExample) | 2017-08-31 |
| JP6325975B2 true JP6325975B2 (ja) | 2018-05-16 |
Family
ID=56130317
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2014257463A Active JP6325975B2 (ja) | 2014-12-19 | 2014-12-19 | リードフレーム、半導体装置 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US9698084B2 (enExample) |
| JP (1) | JP6325975B2 (enExample) |
| KR (1) | KR102452097B1 (enExample) |
| CN (1) | CN105720034B (enExample) |
| TW (1) | TWI668826B (enExample) |
Families Citing this family (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6325975B2 (ja) * | 2014-12-19 | 2018-05-16 | 新光電気工業株式会社 | リードフレーム、半導体装置 |
| JP6577373B2 (ja) * | 2016-01-18 | 2019-09-18 | 新光電気工業株式会社 | リードフレーム及びその製造方法、半導体装置 |
| JP6788509B2 (ja) * | 2017-01-17 | 2020-11-25 | 株式会社三井ハイテック | リードフレームの製造方法およびリードフレーム |
| JP6661565B2 (ja) * | 2017-03-21 | 2020-03-11 | 株式会社東芝 | 半導体装置及びその製造方法 |
| DE102017120747B4 (de) * | 2017-09-08 | 2020-07-30 | Infineon Technologies Austria Ag | SMD-Gehäuse mit Oberseitenkühlung und Verfahren zu seiner Bereitstellung |
| RU180407U1 (ru) * | 2018-02-06 | 2018-06-13 | Закрытое акционерное общество "ГРУППА КРЕМНИЙ ЭЛ" | Выводная рамка корпуса интегральной микросхемы |
| DE102018217659B4 (de) | 2018-10-15 | 2022-08-04 | Vitesco Technologies GmbH | Anordnung und Verfahren zur Herstellung einer elektrisch leitfähigen Verbindung zwischen zwei Substraten |
| JP7271337B2 (ja) * | 2019-06-27 | 2023-05-11 | 新光電気工業株式会社 | 電子部品装置及び電子部品装置の製造方法 |
| JP7467214B2 (ja) * | 2020-04-22 | 2024-04-15 | 新光電気工業株式会社 | 配線基板、電子装置及び配線基板の製造方法 |
| KR102514564B1 (ko) * | 2021-06-28 | 2023-03-29 | 해성디에스 주식회사 | 홈이 형성된 리드를 포함하는 리드 프레임 |
| JP7763055B2 (ja) * | 2021-08-23 | 2025-10-31 | 株式会社ディスコ | パッケージ基板、パッケージ基板の加工方法及びパッケージ基板の製造方法 |
| CN114121853B (zh) * | 2022-01-27 | 2022-05-24 | 深圳中科四合科技有限公司 | 大尺寸芯片适配小尺寸封装体的封装结构 |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6983537B2 (en) * | 2000-07-25 | 2006-01-10 | Mediana Electronic Co., Ltd. | Method of making a plastic package with an air cavity |
| KR100335658B1 (ko) * | 2000-07-25 | 2002-05-06 | 장석규 | 플라스틱 패캐지의 베이스 및 그 제조방법 |
| SG102638A1 (en) * | 2000-09-15 | 2004-03-26 | Samsung Techwin Co Ltd | Lead frame, semiconductor package having the same, and semiconductor package manufacturing method |
| JP3691790B2 (ja) | 2001-12-27 | 2005-09-07 | 株式会社三井ハイテック | 半導体装置の製造方法及び該方法によって製造された半導体装置 |
| KR20060021744A (ko) * | 2004-09-04 | 2006-03-08 | 삼성테크윈 주식회사 | 리드프레임 및 그 제조방법 |
| JP4196937B2 (ja) * | 2004-11-22 | 2008-12-17 | パナソニック株式会社 | 光学装置 |
| US7352058B2 (en) * | 2005-11-01 | 2008-04-01 | Sandisk Corporation | Methods for a multiple die integrated circuit package |
| CN101174602B (zh) * | 2006-10-06 | 2011-10-05 | 万国半导体股份有限公司 | 高电流半导体功率器件小外形集成电路封装 |
| US7622793B2 (en) * | 2006-12-21 | 2009-11-24 | Anderson Richard A | Flip chip shielded RF I/O land grid array package |
| JP5343334B2 (ja) * | 2007-07-17 | 2013-11-13 | 株式会社デンソー | 溶接構造体およびその製造方法 |
| CN101933139B (zh) * | 2007-12-20 | 2012-11-07 | 爱信艾达株式会社 | 半导体装置及其制造方法 |
| CN101383293B (zh) * | 2008-09-26 | 2010-08-04 | 凤凰半导体通信(苏州)有限公司 | 一种微型引线框架半导体封装方法 |
| JP2010263094A (ja) * | 2009-05-08 | 2010-11-18 | Hitachi Metals Ltd | リードフレーム |
| WO2011092871A1 (ja) * | 2010-01-29 | 2011-08-04 | 株式会社 東芝 | Ledパッケージ及びその製造方法 |
| JP5870200B2 (ja) * | 2012-09-24 | 2016-02-24 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法および半導体装置 |
| JP6325975B2 (ja) * | 2014-12-19 | 2018-05-16 | 新光電気工業株式会社 | リードフレーム、半導体装置 |
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| CN105720034B (zh) | 2019-07-05 |
| US20160181187A1 (en) | 2016-06-23 |
| KR20160075316A (ko) | 2016-06-29 |
| CN105720034A (zh) | 2016-06-29 |
| TWI668826B (zh) | 2019-08-11 |
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| JP2016119366A (ja) | 2016-06-30 |
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| KR102452097B1 (ko) | 2022-10-11 |
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