JP6289621B2 - チョクラルスキ法で成長したインゴットからスライスされた高ドープシリコンウエハ中の酸素析出 - Google Patents

チョクラルスキ法で成長したインゴットからスライスされた高ドープシリコンウエハ中の酸素析出 Download PDF

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JP6289621B2
JP6289621B2 JP2016519519A JP2016519519A JP6289621B2 JP 6289621 B2 JP6289621 B2 JP 6289621B2 JP 2016519519 A JP2016519519 A JP 2016519519A JP 2016519519 A JP2016519519 A JP 2016519519A JP 6289621 B2 JP6289621 B2 JP 6289621B2
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single crystal
crystal silicon
concentration
silicon wafer
type single
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JP2016526783A (ja
JP2016526783A5 (enExample
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ロバート・ジェイ・フォルスター
ウラジミール・ブイ・ボロンコフ
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SunEdison Semiconductor Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02694—Controlling the interface between substrate and epitaxial layer, e.g. by ion implantation followed by annealing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/223—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3225—Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/60—Impurity distributions or concentrations

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
JP2016519519A 2013-06-11 2014-05-23 チョクラルスキ法で成長したインゴットからスライスされた高ドープシリコンウエハ中の酸素析出 Active JP6289621B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/914,925 US9634098B2 (en) 2013-06-11 2013-06-11 Oxygen precipitation in heavily doped silicon wafers sliced from ingots grown by the Czochralski method
US13/914,925 2013-06-11
PCT/US2014/039363 WO2014200686A1 (en) 2013-06-11 2014-05-23 Oxygen precipitation in heavily doped silicon wafers sliced from ingots grown by the czochralski method

Publications (3)

Publication Number Publication Date
JP2016526783A JP2016526783A (ja) 2016-09-05
JP2016526783A5 JP2016526783A5 (enExample) 2017-07-20
JP6289621B2 true JP6289621B2 (ja) 2018-03-07

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JP2016519519A Active JP6289621B2 (ja) 2013-06-11 2014-05-23 チョクラルスキ法で成長したインゴットからスライスされた高ドープシリコンウエハ中の酸素析出

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Country Link
US (1) US9634098B2 (enExample)
JP (1) JP6289621B2 (enExample)
KR (3) KR102071304B1 (enExample)
DE (2) DE112014007334B3 (enExample)
WO (1) WO2014200686A1 (enExample)

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KR101759876B1 (ko) * 2015-07-01 2017-07-31 주식회사 엘지실트론 웨이퍼 및 웨이퍼 결함 분석 방법
JP6610056B2 (ja) * 2015-07-28 2019-11-27 株式会社Ｓｕｍｃｏ エピタキシャルシリコンウェーハの製造方法
KR101674819B1 (ko) * 2015-08-12 2016-11-09 주식회사 엘지실트론 단결정 성장 방법
JP6447439B2 (ja) * 2015-09-28 2019-01-09 信越半導体株式会社 貼り合わせｓｏｉウェーハの製造方法
WO2017058928A1 (en) 2015-10-01 2017-04-06 Sunedison Semiconductor Limited Epitaxial growth of defect-free, wafer-scale single-layer graphene on thin films of cobalt
JP6579046B2 (ja) * 2016-06-17 2019-09-25 株式会社Sumco シリコン単結晶の製造方法
EP3653761B1 (en) * 2016-12-28 2024-02-28 Sunedison Semiconductor Limited Silicon wafers with intrinsic gettering and gate oxide integrity yield
JP7306536B1 (ja) 2022-06-14 2023-07-11 信越半導体株式会社 エピタキシャルウェーハの製造方法
CN118507557A (zh) * 2023-09-27 2024-08-16 隆基绿能科技股份有限公司 一种混合掺杂的硅片

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Publication number Publication date
JP2016526783A (ja) 2016-09-05
DE112014002781T5 (de) 2016-03-10
DE112014007334B3 (de) 2023-08-24
KR20200044152A (ko) 2020-04-28
KR102172905B1 (ko) 2020-11-03
KR102071304B1 (ko) 2020-01-31
US9634098B2 (en) 2017-04-25
WO2014200686A1 (en) 2014-12-18
US20140361408A1 (en) 2014-12-11
DE112014002781B9 (de) 2021-07-29
KR20160019495A (ko) 2016-02-19
DE112014002781B4 (de) 2020-06-18
KR20200011563A (ko) 2020-02-03
KR102172904B1 (ko) 2020-11-03

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