JP6165008B2 - メモリ制御装置、メモリ制御方法、情報機器及びプログラム - Google Patents

メモリ制御装置、メモリ制御方法、情報機器及びプログラム Download PDF

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Publication number
JP6165008B2
JP6165008B2 JP2013198330A JP2013198330A JP6165008B2 JP 6165008 B2 JP6165008 B2 JP 6165008B2 JP 2013198330 A JP2013198330 A JP 2013198330A JP 2013198330 A JP2013198330 A JP 2013198330A JP 6165008 B2 JP6165008 B2 JP 6165008B2
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memory
ram
cpu
data
semiconductor memory
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Japanese (ja)
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JP2015064758A (ja
JP2015064758A5 (enExample
Inventor
賀久 野村
賀久 野村
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Canon Inc
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Canon Inc
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Application filed by Canon Inc filed Critical Canon Inc
Priority to JP2013198330A priority Critical patent/JP6165008B2/ja
Priority to KR1020140125697A priority patent/KR101762242B1/ko
Priority to CN201410491575.8A priority patent/CN104464813A/zh
Priority to US14/494,943 priority patent/US10268257B2/en
Priority to EP14186091.6A priority patent/EP2857979B1/en
Publication of JP2015064758A publication Critical patent/JP2015064758A/ja
Publication of JP2015064758A5 publication Critical patent/JP2015064758A5/ja
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1694—Configuration of memory controller to different memory types
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/30—Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3051—Monitoring arrangements for monitoring the configuration of the computing system or of the computing system component, e.g. monitoring the presence of processing resources, peripherals, I/O links, software programs
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/875—Monitoring of systems including the internet
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Record Information Processing For Printing (AREA)
  • Memory System (AREA)
  • Power Sources (AREA)
  • Accessory Devices And Overall Control Thereof (AREA)
JP2013198330A 2013-09-25 2013-09-25 メモリ制御装置、メモリ制御方法、情報機器及びプログラム Active JP6165008B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2013198330A JP6165008B2 (ja) 2013-09-25 2013-09-25 メモリ制御装置、メモリ制御方法、情報機器及びプログラム
KR1020140125697A KR101762242B1 (ko) 2013-09-25 2014-09-22 정보처리장치, 정보처리장치의 제어방법 및 제어 프로그램을 기억하는 비일시 컴퓨터 판독가능한 기억매체
CN201410491575.8A CN104464813A (zh) 2013-09-25 2014-09-23 存储器控制设备、存储器控制方法及信息设备
US14/494,943 US10268257B2 (en) 2013-09-25 2014-09-24 Memory control device that control semiconductor memory, memory control method, information device equipped with memory control device, and storage medium storing memory control program
EP14186091.6A EP2857979B1 (en) 2013-09-25 2014-09-24 Memory control device that controls semiconductory memory, memory control method, information device equipped with memory control device, and storage medium storing memory control program

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013198330A JP6165008B2 (ja) 2013-09-25 2013-09-25 メモリ制御装置、メモリ制御方法、情報機器及びプログラム

Publications (3)

Publication Number Publication Date
JP2015064758A JP2015064758A (ja) 2015-04-09
JP2015064758A5 JP2015064758A5 (enExample) 2016-11-10
JP6165008B2 true JP6165008B2 (ja) 2017-07-19

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JP2013198330A Active JP6165008B2 (ja) 2013-09-25 2013-09-25 メモリ制御装置、メモリ制御方法、情報機器及びプログラム

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Country Link
US (1) US10268257B2 (enExample)
EP (1) EP2857979B1 (enExample)
JP (1) JP6165008B2 (enExample)
KR (1) KR101762242B1 (enExample)
CN (1) CN104464813A (enExample)

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US9830086B2 (en) * 2016-03-03 2017-11-28 Samsung Electronics Co., Ltd. Hybrid memory controller for arbitrating access to volatile and non-volatile memories in a hybrid memory group
US10592114B2 (en) 2016-03-03 2020-03-17 Samsung Electronics Co., Ltd. Coordinated in-module RAS features for synchronous DDR compatible memory
US11003381B2 (en) * 2017-03-07 2021-05-11 Samsung Electronics Co., Ltd. Non-volatile memory storage device capable of self-reporting performance capabilities
US10650899B2 (en) * 2017-04-27 2020-05-12 Everspin Technologies, Inc. Delayed write-back in memory with calibration support
JP7406895B2 (ja) * 2019-10-23 2023-12-28 キヤノン株式会社 情報処理装置および情報処理装置の制御方法
CN111190540B (zh) * 2019-12-25 2021-06-04 晶晨半导体(上海)股份有限公司 内存接口写入均衡的控制方法及装置
CN117280410A (zh) * 2022-04-22 2023-12-22 京东方科技集团股份有限公司 读时序控制方法、装置及计算机可读存储介质

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Also Published As

Publication number Publication date
JP2015064758A (ja) 2015-04-09
KR20150034096A (ko) 2015-04-02
EP2857979B1 (en) 2016-08-31
KR101762242B1 (ko) 2017-07-27
US10268257B2 (en) 2019-04-23
US20150089267A1 (en) 2015-03-26
EP2857979A1 (en) 2015-04-08
CN104464813A (zh) 2015-03-25

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