JP6131018B2 - シャント抵抗器およびその実装方法 - Google Patents
シャント抵抗器およびその実装方法 Download PDFInfo
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- JP6131018B2 JP6131018B2 JP2012223753A JP2012223753A JP6131018B2 JP 6131018 B2 JP6131018 B2 JP 6131018B2 JP 2012223753 A JP2012223753 A JP 2012223753A JP 2012223753 A JP2012223753 A JP 2012223753A JP 6131018 B2 JP6131018 B2 JP 6131018B2
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- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
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- H01L2224/37138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
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- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
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- H01L2224/4005—Shape
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- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
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- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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Description
抵抗体の表面における、第1接続部、第2接続部、架橋部、第1連結部および第2連結部における両面の全面に、アモルファスNi−P合金のメッキ層(12)が形成され、
はんだを介して接続対象に接続される第1接続部の接続面(13a)と、第1連結部のうち、第1接続部の接続面と連続する第1内面(16a)との成す角(X)が、90度より大きく、且つ100度以下とされ、
はんだを介して接続対象に接続される第2接続部の接続面(14a)と、第2連結部のうち、第2接続部の接続面と連続する第2内面(17a)との成す角(Y)が、90度より大きく、且つ100度以下とされることを特徴としている。
最初に、図1を参照して、本実施形態に係るシャント抵抗器10の概略構成について説明する。
第1実施形態では、抵抗体11のうち、はんだ41,42が這い上がり易い箇所、例えば、第1内面16aや第2内面17a、が平面である様態を示した。これに対して、本実施形態では、第1内面16aおよび第2内面17aが非平面形状をなす様態を例に示す。なお、抵抗体11の第1内面16aおよび第2内面17aを除く部分については第1実施形態と同一の構成であるため、詳細の記載を省略する。
本実施形態では、シャント抵抗器10に、メッキ層12を介してセンスボンディングワイヤ50,51が接続された例を示す。
以上、本発明の好ましい実施形態について説明したが、本発明は上述した実施形態になんら制限されることなく、本発明の主旨を逸脱しない範囲において、種々変形して実施することが可能である。また、各実施形態の様態を組み合わせて実施することが可能である。
13・・・第1接続部,13a・・・接続面
14・・・第2接続部,14a・・・接続面
15・・・架橋部
16・・・第1連結部,16a・・・第1内面
17・・・第2連結部,17a・・・第2内面
20,21・・・リードフレーム
30・・・パワーMOSトランジスタ,40,41,42・・・はんだ
Claims (7)
- 電気的に分離された2つの接続対象(21,30)を電気的に接続する抵抗体(11)を有し、
該抵抗体が、
一方の前記接続対象(30)と接続される第1接続部(13)、および、他方の前記接続対象(21)と接続される第2接続部(14)と、
前記第1接続部および前記第2接続部から離れて形成される架橋部(15)と、
前記第1接続部と前記架橋部とを連結する第1連結部(16)、および、前記第2接続部と前記架橋部とを連結する第2連結部(17)、とを有するシャント抵抗器であって、
前記抵抗体の表面における、前記第1接続部、前記第2接続部、前記架橋部、前記第1連結部および前記第2連結部における両面の全面に、アモルファスNi−P合金のメッキ層(12)が形成され、
はんだを介して前記接続対象に接続される前記第1接続部の接続面(13a)と、前記第1連結部のうち、前記第1接続部の接続面と連続する第1内面(16a)との成す角(X)が、90度より大きく、且つ100度以下とされ、
はんだを介して前記接続対象に接続される前記第2接続部の接続面(14a)と、前記第2連結部のうち、前記第2接続部の接続面と連続する第2内面(17a)との成す角(Y)が、90度より大きく、且つ100度以下とされることを特徴とするシャント抵抗器。 - 前記第1内面が、第1壁面(16b)と、該第1壁面よりも前記第1接続部側に位置する第2壁面(16c)と、前記第1壁面と前記第2壁面とを連結する第1連結面(16d)と、を有し、前記第1連結面は、前記第1接続部の接続面に沿う方向に長さを有するとともに、前記架橋部のうち、前記第1内面と連続する下面(15a)に対向するように設けられ、
前記第2内面が、第3壁面(17b)と、該第3壁面よりも前記第2接続部側に位置する第4壁面(17c)と、前記第3壁面と前記第4壁面とを連結する第2連結面(17d)と、を有し、前記第2連結面は、前記第2接続部の接続面に沿う方向に長さを有するとともに、前記架橋部のうち、前記第2内面と連続する下面に対向するように設けられることを特徴とする請求項1に記載のシャント抵抗器。 - 前記抵抗体は屈曲した状態であり、
前記第1接続部、前記第1連結部、前記架橋部、前記第2連結部、および、前記第2接続部が、一体的に形成されていることを特徴とする請求項1または請求項2に記載のシャント抵抗器。 - 前記抵抗体は、Fe−Cr合金、Cu−Ni合金およびCu−Mn−Ni合金のいずれかであることを特徴とする請求項3に記載のシャント抵抗器。
- 前記第1接続部および前記第2接続部は、前記接続対象に沿って延設され、
前記第1接続部の接続面と反対の面(13b)、および、前記第2接続部の接続面と反対の面(14b)に、前記メッキ層が形成され、
第1センスボンディングワイヤ(50)が、前記第1接続部の接続面と反対の面に、電気的に接続され、
第2センスボンディングワイヤ(51)が、前記第2接続部の接続面と反対の面に、電気的に接続されることを特徴とする請求項1〜4のいずれか1項に記載のシャント抵抗器。 - 前記第1センスボンディングワイヤおよび第2センスボンディングワイヤは、AlまたはAl合金からなることを特徴とする請求項1〜5のいずれか1項に記載のシャント抵抗器。
- 請求項5に記載のシャント抵抗器の実装方法であって、
所定形状を有する前記シャント抵抗器を、前記接続対象にリフローはんだ付けするはんだ付け工程と、
該はんだ付け工程の後に、前記第1センスボンディングワイヤおよび前記第2センスボンディングワイヤを前記シャント抵抗器に電気的に接続するボンディング工程と、を有し、
該ボンディング工程は、
前記第1接続部における接続面と反対の面のうち、前記第1センスボンディングワイヤが接続される第1座標を決定するための原点を決定する原点決定工程と、
該原点決定工程の後、前記原点に基づいて、前記第1座標を決定する第1座標決定工程と、
該第1座標決定工程の後、前記第1座標から所定距離を有し、第2センスボンディングワイヤが接続される第2座標を決定する第2座標決定工程と、
該第2座標決定工程の後、前記第1座標の位置に、前記第1センスボンディングワイヤを接続し、前記第2座標に前記第2センスボンディングワイヤを接続するワイヤ接続工程と、を備えることを特徴とするシャント抵抗器の実装方法。
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JP6344163B2 (ja) * | 2014-09-03 | 2018-06-20 | 株式会社デンソー | シャント抵抗器 |
JP6384211B2 (ja) | 2014-09-03 | 2018-09-05 | 株式会社デンソー | シャント抵抗器 |
US10156587B2 (en) * | 2014-10-22 | 2018-12-18 | Koa Corporation | Current detecting device and current detecting resistor |
GB2557695A (en) * | 2015-10-02 | 2018-06-27 | Shindengen Electric Mfg | Mounting structure for shunt resistor and method for manufacturing mounting structure for shunt resistor |
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