JP6083129B2 - 半導体装置の製造方法および製造装置 - Google Patents
半導体装置の製造方法および製造装置 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims description 79
- 238000004519 manufacturing process Methods 0.000 title claims description 43
- 239000000758 substrate Substances 0.000 claims description 78
- 230000007547 defect Effects 0.000 claims description 75
- 239000013078 crystal Substances 0.000 claims description 69
- 239000003550 marker Substances 0.000 claims description 60
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 47
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 46
- 238000007689 inspection Methods 0.000 claims description 24
- 238000000034 method Methods 0.000 claims description 19
- 238000001514 detection method Methods 0.000 claims description 5
- 238000005520 cutting process Methods 0.000 claims description 4
- 230000001678 irradiating effect Effects 0.000 claims description 4
- 238000000206 photolithography Methods 0.000 claims description 4
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 3
- 230000005540 biological transmission Effects 0.000 claims description 3
- 229910002601 GaN Inorganic materials 0.000 claims description 2
- 238000005259 measurement Methods 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005401 electroluminescence Methods 0.000 description 2
- 230000005284 excitation Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 238000003491 array Methods 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000013507 mapping Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
- G01N21/84—Systems specially adapted for particular applications
- G01N21/88—Investigating the presence of flaws or contamination
- G01N21/95—Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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- H01L21/67005—Apparatus not specifically provided for elsewhere
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67288—Monitoring of warpage, curvature, damage, defects or the like
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- H—ELECTRICITY
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/1608—Silicon carbide
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/2003—Nitride compounds
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Description
本発明は、座標原点をマーカーとして半導体基板に予め作製しておく。これにより、マーカーを基準に結晶欠陥位置および半導体装置位置を決定し、容易に位置関係の対応をとることができる。そして、半導体装置の製造工程中に、結晶欠陥検出の工程も含めることができるようになる。
11(11a,11b,11c) マーカー
12 結晶欠陥
20 SBDチップ
Claims (10)
- 半導体基板の内部に作製するチップの領域を規定する座標位置の基準となるマーカーを形成する工程と、
前記半導体基板上の結晶欠陥を検出する工程と、
検出した前記結晶欠陥の座標位置を前記マーカーに基づき検出する工程と、
前記マーカーの内部端面に基づいて前記領域を縦横に所定数で区切ってアレイ上に複数の半導体装置を作製する際、前記領域を規定する座標位置と検出した前記結晶欠陥の座標位置とに基づき、前記結晶欠陥が前記複数の半導体装置のうちどの半導体装置に含まれるかを検出する工程と、
を含むことを特徴とする半導体装置の製造方法。 - 前記結晶欠陥の検出と同時に前記マーカーを形成することを特徴とする請求項1に記載の半導体装置の製造方法。
- 前記結晶欠陥の検出後に、前記マーカーを形成することを特徴とする請求項1に記載の半導体装置の製造方法。
- 前記半導体基板として炭化珪素を用いることを特徴とする請求項1〜3のいずれか一つに記載の半導体装置の製造方法。
- 前記半導体基板として窒化ガリウムを用いることを特徴とする請求項1〜3のいずれか一つに記載の半導体装置の製造方法。
- 前記マーカーをレーザーを用いて形成することを特徴とする請求項1〜5のいずれか一つに記載の半導体装置の製造方法。
- 前記マーカーをフォトリソグラフィにより形成することを特徴とする請求項1〜5のいずれか一つに記載の半導体装置の製造方法。
- 前記マーカーを物理的切削により形成することを特徴とする請求項1〜5のいずれか一つに記載の半導体装置の製造方法。
- 前記結晶欠陥は、前記半導体基板に対して照射光を照射し、当該照射光の散乱、反射、透過に基づき検出することを特徴とする請求項1〜8のいずれか一つに記載の半導体装置の製造方法。
- 半導体基板の内部に作製するチップの領域を規定する座標位置の基準となるマーカーを形成するマーカー形成部と、
前記半導体基板上の結晶欠陥を検出する検査部と、を備え、
前記検査部は、
検出した前記結晶欠陥の座標位置を前記マーカーに基づき検出し、
前記マーカーの内部端面に基づいて前記領域を縦横に所定数で区切ってアレイ上に複数の半導体装置を作製する際、前記領域を規定する座標位置と検出した前記結晶欠陥の座標位置とに基づき、前記結晶欠陥が前記複数の半導体装置のうちどの半導体装置に含まれるかを検出することを特徴とする半導体装置の製造装置。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
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JP2012104222A JP6083129B2 (ja) | 2012-04-27 | 2012-04-27 | 半導体装置の製造方法および製造装置 |
CN201380018848.0A CN104205316B (zh) | 2012-04-27 | 2013-03-18 | 半导体装置的制造方法以及制造装置 |
DE112013002341.5T DE112013002341B4 (de) | 2012-04-27 | 2013-03-18 | Herstellungsverfahren und Herstellungsvorrichtung für Halbleitervorrichtungen |
PCT/JP2013/057737 WO2013161447A1 (ja) | 2012-04-27 | 2013-03-18 | 半導体装置の製造方法および製造装置 |
US14/505,589 US9431348B2 (en) | 2012-04-27 | 2014-10-03 | Semiconductor device manufacturing method and manufacturing device for marking a crystal defect |
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JP2012104222A JP6083129B2 (ja) | 2012-04-27 | 2012-04-27 | 半導体装置の製造方法および製造装置 |
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JP2013232555A JP2013232555A (ja) | 2013-11-14 |
JP6083129B2 true JP6083129B2 (ja) | 2017-02-22 |
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JP (1) | JP6083129B2 (ja) |
CN (1) | CN104205316B (ja) |
DE (1) | DE112013002341B4 (ja) |
WO (1) | WO2013161447A1 (ja) |
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US20170262975A1 (en) * | 2016-03-08 | 2017-09-14 | Kabushiki Kaisha Toshiba | Wafer inspection method for manufacturing semiconductor device |
JP6954775B2 (ja) | 2017-06-29 | 2021-10-27 | 浜松ホトニクス株式会社 | デバイス解析装置及びデバイス解析方法 |
JP6917911B2 (ja) * | 2018-01-15 | 2021-08-11 | 三菱電機株式会社 | テスト条件決定装置及びテスト条件決定方法 |
JP7158224B2 (ja) * | 2018-09-26 | 2022-10-21 | 浜松ホトニクス株式会社 | 半導体デバイス検査方法及び半導体デバイス検査装置 |
DE102020202096B3 (de) * | 2020-02-19 | 2021-05-27 | Greenerity Gmbh | Verfahren und Vorrichtung zur Markierung eines Defekts in einer funktionalen Schicht einer Brennstoffzelle, einer Elektrolysezelle oder einer elektrochemischen Sensoranwendung |
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US20150024520A1 (en) | 2015-01-22 |
DE112013002341B4 (de) | 2023-01-12 |
CN104205316B (zh) | 2016-09-07 |
WO2013161447A1 (ja) | 2013-10-31 |
DE112013002341T8 (de) | 2015-04-09 |
JP2013232555A (ja) | 2013-11-14 |
DE112013002341T5 (de) | 2015-02-12 |
US9431348B2 (en) | 2016-08-30 |
CN104205316A (zh) | 2014-12-10 |
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