JP6050975B2 - リードフレーム、半導体装置及びリードフレームの製造方法 - Google Patents

リードフレーム、半導体装置及びリードフレームの製造方法 Download PDF

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Publication number
JP6050975B2
JP6050975B2 JP2012150495A JP2012150495A JP6050975B2 JP 6050975 B2 JP6050975 B2 JP 6050975B2 JP 2012150495 A JP2012150495 A JP 2012150495A JP 2012150495 A JP2012150495 A JP 2012150495A JP 6050975 B2 JP6050975 B2 JP 6050975B2
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Prior art keywords
layer
wiring
lead frame
resin layer
opening
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JP2012150495A
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Japanese (ja)
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JP2013229542A5 (enExample
JP2013229542A (ja
Inventor
小林　敏男
敏男 小林
清水　浩
浩 清水
敏幸 岡部
敏幸 岡部
木村　康之
康之 木村
小林　和貴
和貴 小林
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Priority to JP2012150495A priority Critical patent/JP6050975B2/ja
Priority to US13/848,225 priority patent/US8928130B2/en
Priority to EP13160808.5A priority patent/EP2645415B1/en
Priority to CN201310100730.4A priority patent/CN103367300B/zh
Publication of JP2013229542A publication Critical patent/JP2013229542A/ja
Publication of JP2013229542A5 publication Critical patent/JP2013229542A5/ja
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    • H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
    • H01L25/0655—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/183—Connection portion, e.g. seal
    • H01L2924/18301—Connection portion, e.g. seal being an anchoring portion, i.e. mechanical interlocking between the encapsulation resin and another package part
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/036—Manufacture or treatment of packages
    • H10H20/0364—Manufacture or treatment of packages of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/85—Packages
    • H10H20/858—Means for heat extraction or cooling
    • H10H20/8583—Means for heat extraction or cooling not being in contact with the bodies

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
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Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6032086B2 (ja) * 2013-03-25 2016-11-24 豊田合成株式会社 発光装置
JP6418625B2 (ja) * 2013-12-13 2018-11-07 東芝メモリ株式会社 半導体装置の製造方法
CN103887185B (zh) * 2014-04-08 2017-01-18 安捷利（番禺）电子实业有限公司 一种用于芯片封装的引线框架的制备方法
JP6375753B2 (ja) * 2014-07-24 2018-08-22 大日本印刷株式会社 リードフレームの多面付け体、樹脂付きリードフレームの多面付け体、半導体装置の多面付け体
TWI610411B (zh) * 2014-08-14 2018-01-01 艾馬克科技公司 用於半導體晶粒互連的雷射輔助接合
KR20160028014A (ko) * 2014-09-02 2016-03-11 삼성전자주식회사 반도체 소자 패키지 제조방법
US9859481B2 (en) * 2014-12-22 2018-01-02 Nichia Corporation Light emitting device
US9590158B2 (en) 2014-12-22 2017-03-07 Nichia Corporation Light emitting device
JP2016207893A (ja) * 2015-04-24 2016-12-08 イビデン株式会社 プリント配線板およびその製造方法
JP6589577B2 (ja) * 2015-11-10 2019-10-16 凸版印刷株式会社 樹脂付リードフレーム基板の製造方法
US11158772B2 (en) * 2016-05-18 2021-10-26 Lumileds Llc Lighting assembly and method for manufacturing a lighting assembly
TWI620279B (zh) * 2016-09-30 2018-04-01 Chang Wah Technology Co., Ltd. 分離式預成形封裝導線架及其製作方法
JP6777365B2 (ja) * 2016-12-09 2020-10-28 大口マテリアル株式会社 リードフレーム
WO2018182595A1 (en) * 2017-03-29 2018-10-04 Intel Corporation Embedded die microelectronic device with molded component
JP6924411B2 (ja) * 2017-08-28 2021-08-25 大日本印刷株式会社 リードフレームおよび半導体装置の製造方法
JP6637003B2 (ja) * 2017-09-08 2020-01-29 サンコール株式会社 バスバーアッセンブリ
JP2020025019A (ja) 2018-08-07 2020-02-13 キオクシア株式会社 半導体装置
TWI681572B (zh) * 2018-11-26 2020-01-01 諾沛半導體有限公司 高覆蓋率發光二極體載板
TWI672711B (zh) 2019-01-10 2019-09-21 健策精密工業股份有限公司 絕緣金屬基板及其製造方法
DE102019106546A1 (de) * 2019-03-14 2020-09-17 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Verfahren zur herstellung von optoelektronischen halbleiterbauteilen und optoelektronisches halbleiterbauteil
TWI692846B (zh) * 2019-03-21 2020-05-01 旭德科技股份有限公司 散熱基板及其製作方法
CN112250029B (zh) * 2020-11-10 2025-06-10 武汉飞恩微电子有限公司 压力传感器、基板结构及其制造方法
CN113193094B (zh) * 2021-04-27 2023-03-21 成都辰显光电有限公司 批量转移方法和显示面板
US20230038411A1 (en) * 2021-08-03 2023-02-09 Texas Instruments Incorporated Semiconductor package with raised dam on clip or leadframe

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3135823A (en) * 1960-06-28 1964-06-02 Pritikin Nathan Metallic element embedding process and product
JP2781020B2 (ja) * 1989-09-06 1998-07-30 モトローラ・インコーポレーテッド 半導体装置およびその製造方法
JPH09252014A (ja) * 1996-03-15 1997-09-22 Nissan Motor Co Ltd 半導体素子の製造方法
JP2001177022A (ja) * 1999-12-17 2001-06-29 Matsushita Electric Ind Co Ltd 熱伝導基板とその製造方法
US6909178B2 (en) * 2000-09-06 2005-06-21 Sanyo Electric Co., Ltd. Semiconductor device and method of manufacturing the same
CN100482035C (zh) * 2000-12-27 2009-04-22 松下电器产业株式会社 导热性基板的制造方法
JP3833938B2 (ja) * 2000-12-27 2006-10-18 松下電器産業株式会社 リードフレームおよびその製造方法、ならびに熱伝導性基板の製造方法
JP2003309241A (ja) 2002-04-15 2003-10-31 Dainippon Printing Co Ltd リードフレーム部材とリードフレーム部材の製造方法、及び該リードフレーム部材を用いた半導体パッケージとその製造方法
JP2003309242A (ja) * 2002-04-15 2003-10-31 Dainippon Printing Co Ltd リードフレーム部材とリードフレーム部材の製造方法、及び該リードフレーム部材を用いた半導体パッケージとその製造方法
CN1549669A (zh) * 2003-05-09 2004-11-24 ������������ʽ���� 板状体的制造方法及采用该板状体的电路装置制造方法
JP4589170B2 (ja) * 2005-04-28 2010-12-01 新光電気工業株式会社 半導体装置及びその製造方法
US7772681B2 (en) * 2005-06-30 2010-08-10 Fairchild Semiconductor Corporation Semiconductor die package and method for making the same
JP2008098488A (ja) * 2006-10-13 2008-04-24 Matsushita Electric Ind Co Ltd 熱伝導基板とその製造方法
JP5526575B2 (ja) * 2009-03-30 2014-06-18 凸版印刷株式会社 半導体素子用基板の製造方法および半導体装置
US8501539B2 (en) * 2009-11-12 2013-08-06 Freescale Semiconductor, Inc. Semiconductor device package
JP2012033855A (ja) * 2010-07-01 2012-02-16 Hitachi Cable Ltd Ｌｅｄモジュール、ｌｅｄパッケージ、並びに配線基板およびその製造方法
JP2013153068A (ja) * 2012-01-25 2013-08-08 Shinko Electric Ind Co Ltd 配線基板、発光装置及び配線基板の製造方法

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CN103367300A (zh) 2013-10-23
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