JP6038517B2 - 配線基板及びその製造方法 - Google Patents
配線基板及びその製造方法 Download PDFInfo
- Publication number
- JP6038517B2 JP6038517B2 JP2012157907A JP2012157907A JP6038517B2 JP 6038517 B2 JP6038517 B2 JP 6038517B2 JP 2012157907 A JP2012157907 A JP 2012157907A JP 2012157907 A JP2012157907 A JP 2012157907A JP 6038517 B2 JP6038517 B2 JP 6038517B2
- Authority
- JP
- Japan
- Prior art keywords
- resin
- substrate
- wiring board
- core
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
- H05K3/4605—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated made from inorganic insulating material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0183—Dielectric layers
- H05K2201/0187—Dielectric layers with regions of different dielectrics in the same layer, e.g. in a printed capacitor for locally changing the dielectric properties
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/06—Thermal details
- H05K2201/068—Thermal details wherein the coefficient of thermal expansion is important
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09145—Edge details
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0047—Drilling of holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Inorganic Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Ceramic Engineering (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012157907A JP6038517B2 (ja) | 2012-07-13 | 2012-07-13 | 配線基板及びその製造方法 |
| US13/939,442 US9159648B2 (en) | 2012-07-13 | 2013-07-11 | Wiring substrate and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012157907A JP6038517B2 (ja) | 2012-07-13 | 2012-07-13 | 配線基板及びその製造方法 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2016102163A Division JP6148764B2 (ja) | 2016-05-23 | 2016-05-23 | 配線基板及びその製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2014022465A JP2014022465A (ja) | 2014-02-03 |
| JP2014022465A5 JP2014022465A5 (enExample) | 2015-08-06 |
| JP6038517B2 true JP6038517B2 (ja) | 2016-12-07 |
Family
ID=49913297
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012157907A Active JP6038517B2 (ja) | 2012-07-13 | 2012-07-13 | 配線基板及びその製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US9159648B2 (enExample) |
| JP (1) | JP6038517B2 (enExample) |
Families Citing this family (42)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101548816B1 (ko) * | 2013-11-11 | 2015-08-31 | 삼성전기주식회사 | 인쇄회로기판 및 그 제조방법 |
| US10971476B2 (en) | 2014-02-18 | 2021-04-06 | Qualcomm Incorporated | Bottom package with metal post interconnections |
| KR101580287B1 (ko) * | 2014-05-02 | 2015-12-24 | 삼성전기주식회사 | 인쇄회로기판, 인쇄회로기판 스트립 및 그 제조방법 |
| KR102281459B1 (ko) * | 2014-11-05 | 2021-07-27 | 삼성전기주식회사 | 인쇄회로기판 및 그 제조방법 |
| KR101629435B1 (ko) * | 2014-11-10 | 2016-06-10 | 삼성전기주식회사 | 인쇄회로기판 및 그 제조방법 |
| JP2016219452A (ja) * | 2015-05-14 | 2016-12-22 | 富士通株式会社 | 多層基板及び多層基板の製造方法 |
| KR20170004260A (ko) | 2015-07-01 | 2017-01-11 | 삼성전기주식회사 | 인쇄회로기판 및 그 제조방법 |
| JP2017073424A (ja) * | 2015-10-05 | 2017-04-13 | 日本特殊陶業株式会社 | 配線基板及びその製造方法 |
| JP2017073425A (ja) * | 2015-10-05 | 2017-04-13 | 日本特殊陶業株式会社 | 配線基板及びその製造方法 |
| JP6449478B2 (ja) * | 2015-10-21 | 2019-01-09 | シャープ株式会社 | ガラス配線基板およびパワーモジュール |
| JP6840935B2 (ja) * | 2016-05-10 | 2021-03-10 | 凸版印刷株式会社 | 配線回路基板の製造方法 |
| US10410883B2 (en) | 2016-06-01 | 2019-09-10 | Corning Incorporated | Articles and methods of forming vias in substrates |
| JP2017220647A (ja) * | 2016-06-10 | 2017-12-14 | 凸版印刷株式会社 | パッケージ用基板 |
| US10794679B2 (en) | 2016-06-29 | 2020-10-06 | Corning Incorporated | Method and system for measuring geometric parameters of through holes |
| JP6341245B2 (ja) * | 2016-09-05 | 2018-06-13 | 大日本印刷株式会社 | 貫通電極基板の製造方法、貫通電極基板および半導体装置 |
| JP6816486B2 (ja) * | 2016-12-07 | 2021-01-20 | 凸版印刷株式会社 | コア基板、多層配線基板、半導体パッケージ、半導体モジュール、銅張基板、及びコア基板の製造方法 |
| JP6852404B2 (ja) * | 2017-01-06 | 2021-03-31 | 大日本印刷株式会社 | インターポーザー及びその製造方法、並びに、インターポーザーを備える半導体装置 |
| US10580725B2 (en) | 2017-05-25 | 2020-03-03 | Corning Incorporated | Articles having vias with geometry attributes and methods for fabricating the same |
| US11078112B2 (en) * | 2017-05-25 | 2021-08-03 | Corning Incorporated | Silica-containing substrates with vias having an axially variable sidewall taper and methods for forming the same |
| US12180108B2 (en) | 2017-12-19 | 2024-12-31 | Corning Incorporated | Methods for etching vias in glass-based articles employing positive charge organic molecules |
| JP7106875B2 (ja) | 2018-01-30 | 2022-07-27 | 凸版印刷株式会社 | ガラスコアデバイスの製造方法 |
| US11554984B2 (en) | 2018-02-22 | 2023-01-17 | Corning Incorporated | Alkali-free borosilicate glasses with low post-HF etch roughness |
| US10470300B1 (en) * | 2018-07-24 | 2019-11-05 | AGC Inc. | Glass panel for wiring board and method of manufacturing wiring board |
| TWI771610B (zh) * | 2019-09-02 | 2022-07-21 | 矽品精密工業股份有限公司 | 電子封裝件及其承載結構與製法 |
| US12261124B2 (en) | 2019-12-23 | 2025-03-25 | Intel Corporation | Embedded die architecture and method of making |
| JP2021108317A (ja) * | 2019-12-27 | 2021-07-29 | イビデン株式会社 | プリント配線板およびその製造方法 |
| JP7453509B2 (ja) * | 2020-01-15 | 2024-03-21 | イビデン株式会社 | プリント配線板及びプリント配線板の製造方法 |
| US11901248B2 (en) * | 2020-03-27 | 2024-02-13 | Intel Corporation | Embedded die architecture and method of making |
| CN115315803A (zh) * | 2020-03-31 | 2022-11-08 | 索尼半导体解决方案公司 | 半导体装置 |
| WO2021200406A1 (ja) * | 2020-03-31 | 2021-10-07 | ソニーセミコンダクタソリューションズ株式会社 | 半導体装置 |
| US20220392832A1 (en) * | 2021-06-06 | 2022-12-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor structures and methods of forming the same |
| US20230092740A1 (en) * | 2021-09-21 | 2023-03-23 | Intel Corporation | Moat protection to prevent crack propagation in glass core substrates or glass interposers |
| JP7782220B2 (ja) * | 2021-11-18 | 2025-12-09 | Toppanホールディングス株式会社 | 多層配線基板および多層配線基板の製造方法 |
| TWI806490B (zh) | 2022-03-14 | 2023-06-21 | 巨擘科技股份有限公司 | 封裝基板結構 |
| CN119547574A (zh) * | 2022-07-01 | 2025-02-28 | 凸版控股株式会社 | 玻璃芯层叠结构体以及玻璃芯层叠结构体的制造方法 |
| KR20240071319A (ko) * | 2022-11-15 | 2024-05-22 | 앱솔릭스 인코포레이티드 | 기판 및 반도체 모듈 |
| US20250112136A1 (en) * | 2023-09-29 | 2025-04-03 | Intel Corporation | Glass core protection using peripheral buffer layers |
| JP2025088548A (ja) * | 2023-11-30 | 2025-06-11 | Rapidus株式会社 | 電子装置 |
| JP2025088549A (ja) * | 2023-11-30 | 2025-06-11 | Rapidus株式会社 | 電子装置 |
| WO2025142479A1 (ja) * | 2023-12-28 | 2025-07-03 | Toppanホールディングス株式会社 | 多層配線母材基板、多層配線基板および多層配線基板の製造方法 |
| WO2025142478A1 (ja) * | 2023-12-28 | 2025-07-03 | Toppanホールディングス株式会社 | 多層配線基板、多層配線基板の製造方法および多層配線母材基板 |
| US20260005081A1 (en) * | 2024-06-28 | 2026-01-01 | Intel Corporation | Hybrid glass and organic substrates |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000124603A (ja) * | 1999-08-05 | 2000-04-28 | Ibiden Co Ltd | プリント配線板 |
| JP3489113B2 (ja) * | 1999-12-20 | 2004-01-19 | 関西日本電気株式会社 | 半導体装置 |
| JP5191074B2 (ja) * | 2001-07-10 | 2013-04-24 | イビデン株式会社 | 多層プリント配線板 |
| JP3926736B2 (ja) * | 2002-12-09 | 2007-06-06 | 新光電気工業株式会社 | 配線基板及びその製造方法並びに半導体装置 |
| JP2004288660A (ja) * | 2003-01-29 | 2004-10-14 | Kyocera Corp | 配線基板 |
| JP2005086071A (ja) | 2003-09-10 | 2005-03-31 | Hitachi Chem Co Ltd | 多層配線基板、半導体チップ搭載基板及び半導体パッケージ、並びにそれらの製造方法 |
| JP2009099661A (ja) * | 2007-10-15 | 2009-05-07 | Shinko Electric Ind Co Ltd | 配線基板の個片化方法およびパッケージ用基板 |
| JP5297139B2 (ja) * | 2008-10-09 | 2013-09-25 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
| JP5193809B2 (ja) * | 2008-11-05 | 2013-05-08 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
| JP2011029488A (ja) * | 2009-07-28 | 2011-02-10 | Kyocera Corp | 配線基板 |
| JP2011165741A (ja) * | 2010-02-05 | 2011-08-25 | Renesas Electronics Corp | 半導体装置およびその製造方法 |
-
2012
- 2012-07-13 JP JP2012157907A patent/JP6038517B2/ja active Active
-
2013
- 2013-07-11 US US13/939,442 patent/US9159648B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| US9159648B2 (en) | 2015-10-13 |
| JP2014022465A (ja) | 2014-02-03 |
| US20140015121A1 (en) | 2014-01-16 |
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