JP6013336B2 - 冗長シリコン貫通ビアを伴う半導体チップ - Google Patents
冗長シリコン貫通ビアを伴う半導体チップ Download PDFInfo
- Publication number
- JP6013336B2 JP6013336B2 JP2013528332A JP2013528332A JP6013336B2 JP 6013336 B2 JP6013336 B2 JP 6013336B2 JP 2013528332 A JP2013528332 A JP 2013528332A JP 2013528332 A JP2013528332 A JP 2013528332A JP 6013336 B2 JP6013336 B2 JP 6013336B2
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
- H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
- H10W20/0245—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising use of blind vias during the manufacture
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10W20/211—Through-semiconductor vias, e.g. TSVs
- H10W20/212—Top-view shapes or dispositions, e.g. top-view layouts of the vias
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10W20/211—Through-semiconductor vias, e.g. TSVs
- H10W20/212—Top-view shapes or dispositions, e.g. top-view layouts of the vias
- H10W20/2125—Top-view shapes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/019—Manufacture or treatment of bond pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
- H10W72/07254—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting changes in dispositions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/241—Dispositions, e.g. layouts
- H10W72/242—Dispositions, e.g. layouts relative to the surface, e.g. recessed, protruding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/241—Dispositions, e.g. layouts
- H10W72/244—Dispositions, e.g. layouts relative to underlying supporting features, e.g. bond pads, RDLs or vias
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/241—Dispositions, e.g. layouts
- H10W72/247—Dispositions of multiple bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/251—Materials
- H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/29—Bond pads specially adapted therefor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/823—Interconnections through encapsulations, e.g. pillars through molded resin on a lateral side a chip
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/921—Structures or relative sizes of bond pads
- H10W72/923—Bond pads having multiple stacked layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/921—Structures or relative sizes of bond pads
- H10W72/923—Bond pads having multiple stacked layers
- H10W72/9232—Bond pads having multiple stacked layers with additional elements interposed between layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
- H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
- H10W72/942—Dispositions of bond pads relative to underlying supporting features, e.g. bond pads, RDLs or vias
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
- H10W72/944—Dispositions of multiple bond pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/951—Materials of bond pads
- H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/878,542 | 2010-09-09 | ||
| US12/878,542 US9437561B2 (en) | 2010-09-09 | 2010-09-09 | Semiconductor chip with redundant thru-silicon-vias |
| PCT/US2011/051027 WO2012034034A1 (en) | 2010-09-09 | 2011-09-09 | Semiconductor chip with redundant thru-silicon-vias |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2013538460A JP2013538460A (ja) | 2013-10-10 |
| JP2013538460A5 JP2013538460A5 (https=) | 2014-10-30 |
| JP6013336B2 true JP6013336B2 (ja) | 2016-10-25 |
Family
ID=44653600
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013528332A Active JP6013336B2 (ja) | 2010-09-09 | 2011-09-09 | 冗長シリコン貫通ビアを伴う半導体チップ |
Country Status (5)
| Country | Link |
|---|---|
| US (3) | US9437561B2 (https=) |
| EP (1) | EP2614523B1 (https=) |
| JP (1) | JP6013336B2 (https=) |
| KR (1) | KR101850121B1 (https=) |
| WO (1) | WO2012034034A1 (https=) |
Families Citing this family (31)
| Publication number | Priority date | Publication date | Assignee | Title |
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| JP5826532B2 (ja) * | 2010-07-15 | 2015-12-02 | 新光電気工業株式会社 | 半導体装置及びその製造方法 |
| US8314498B2 (en) * | 2010-09-10 | 2012-11-20 | Aptina Imaging Corporation | Isolated bond pad with conductive via interconnect |
| US20140252606A1 (en) * | 2011-10-17 | 2014-09-11 | Panasonic Corporation | Integrated circuit, multicore processor apparatus, and method for manufacturing integrated circuit |
| US9030010B2 (en) * | 2012-09-20 | 2015-05-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Packaging devices and methods |
| US8866287B2 (en) * | 2012-09-29 | 2014-10-21 | Intel Corporation | Embedded structures for package-on-package architecture |
| CN104037149A (zh) * | 2013-03-05 | 2014-09-10 | 飞思卡尔半导体公司 | 引线框和基板半导体封装 |
| US20160225694A1 (en) * | 2013-06-27 | 2016-08-04 | Hans-Joachim Barth | High conductivity high frequency via for electronic systems |
| JP2015041691A (ja) * | 2013-08-21 | 2015-03-02 | 株式会社東芝 | 半導体装置および半導体装置の製造方法 |
| US9405468B2 (en) | 2014-05-13 | 2016-08-02 | Globalfoundries Inc. | Stacked memory device control |
| US9389972B2 (en) | 2014-05-13 | 2016-07-12 | International Business Machines Corporation | Data retrieval from stacked computer memory |
| KR101640076B1 (ko) * | 2014-11-05 | 2016-07-15 | 앰코 테크놀로지 코리아 주식회사 | 웨이퍼 레벨의 칩 적층형 패키지 및 이의 제조 방법 |
| US9515017B2 (en) * | 2014-12-18 | 2016-12-06 | Intel Corporation | Ground via clustering for crosstalk mitigation |
| US9515035B2 (en) | 2014-12-19 | 2016-12-06 | International Business Machines Corporation | Three-dimensional integrated circuit integration |
| CN105990282B (zh) * | 2015-02-27 | 2019-03-01 | 华为技术有限公司 | 一种转接板及电子组件 |
| US9971970B1 (en) | 2015-04-27 | 2018-05-15 | Rigetti & Co, Inc. | Microwave integrated quantum circuits with VIAS and methods for making the same |
| US10090251B2 (en) | 2015-07-24 | 2018-10-02 | Infineon Technologies Ag | Semiconductor chip having a dense arrangement of contact terminals |
| US10236245B2 (en) * | 2016-03-23 | 2019-03-19 | Dyi-chung Hu | Package substrate with embedded circuit |
| WO2018125069A1 (en) * | 2016-12-28 | 2018-07-05 | Intel Corporation | Methods of forming substrate interconnect structures for enhanced thin seed conduction |
| US11121301B1 (en) | 2017-06-19 | 2021-09-14 | Rigetti & Co, Inc. | Microwave integrated quantum circuits with cap wafers and their methods of manufacture |
| US11276727B1 (en) | 2017-06-19 | 2022-03-15 | Rigetti & Co, Llc | Superconducting vias for routing electrical signals through substrates and their methods of manufacture |
| KR102019355B1 (ko) | 2017-11-01 | 2019-09-09 | 삼성전자주식회사 | 반도체 패키지 |
| KR102498883B1 (ko) | 2018-01-31 | 2023-02-13 | 삼성전자주식회사 | 전류를 분산시키는 관통 전극들을 포함하는 반도체 장치 |
| TWI705547B (zh) * | 2019-03-12 | 2020-09-21 | 力成科技股份有限公司 | 晶片封裝結構及其製造方法 |
| US11804479B2 (en) * | 2019-09-27 | 2023-10-31 | Advanced Micro Devices, Inc. | Scheme for enabling die reuse in 3D stacked products |
| KR102943382B1 (ko) * | 2019-12-06 | 2026-03-23 | 삼성전자주식회사 | 인터포저, 반도체 패키지, 및 인터포저의 제조 방법 |
| US11515173B2 (en) * | 2019-12-27 | 2022-11-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor devices and methods of manufacturing |
| CN113053758A (zh) | 2019-12-27 | 2021-06-29 | 台湾积体电路制造股份有限公司 | 半导体器件的制造方法 |
| TWI773360B (zh) * | 2021-06-03 | 2022-08-01 | 矽品精密工業股份有限公司 | 電子封裝件及其承載結構與製法 |
| US11955417B2 (en) | 2021-12-14 | 2024-04-09 | Industrial Technology Research Institute | Electronic device having substrate with electrically floating vias |
| US12292603B2 (en) | 2022-09-19 | 2025-05-06 | Globalfoundries U.S. Inc. | PIC structure with wire(s) between z-stop supports on side of optical device attach cavity |
| JP2026510132A (ja) | 2022-10-31 | 2026-04-01 | キョーセラ・エーブイエックス・コンポーネンツ・コーポレーション | 多層コンデンサ |
Family Cites Families (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6124240A (ja) | 1984-07-13 | 1986-02-01 | Toshiba Corp | 半導体基板 |
| US6355950B1 (en) * | 1998-09-23 | 2002-03-12 | Intel Corporation | Substrate interconnect for power distribution on integrated circuits |
| US6352923B1 (en) * | 1999-03-01 | 2002-03-05 | United Microelectronics Corp. | Method of fabricating direct contact through hole type |
| JP4123682B2 (ja) * | 2000-05-16 | 2008-07-23 | セイコーエプソン株式会社 | 半導体装置及びその製造方法 |
| US7345350B2 (en) * | 2003-09-23 | 2008-03-18 | Micron Technology, Inc. | Process and integration scheme for fabricating conductive components, through-vias and semiconductor components including conductive through-wafer vias |
| JP4426482B2 (ja) | 2005-02-28 | 2010-03-03 | Okiセミコンダクタ株式会社 | パッケージ基台およびその製造方法、並びにそのパッケージ基台を備えた半導体パッケージ |
| US20070032059A1 (en) * | 2005-08-02 | 2007-02-08 | Harry Hedler | Method of manufacturing a semiconductor structure having a wafer through-contact and a corresponding semiconductor structure |
| US20070045844A1 (en) * | 2005-08-24 | 2007-03-01 | Andry Paul S | Alpha particle shields in chip packaging |
| JP4847072B2 (ja) | 2005-08-26 | 2011-12-28 | 本田技研工業株式会社 | 半導体集積回路装置およびその製造方法 |
| JP4415984B2 (ja) * | 2006-12-06 | 2010-02-17 | ソニー株式会社 | 半導体装置の製造方法 |
| JP2008244187A (ja) * | 2007-03-28 | 2008-10-09 | Elpida Memory Inc | 貫通電極および半導体装置 |
| JP4534096B2 (ja) | 2007-04-12 | 2010-09-01 | ローム株式会社 | 半導体チップおよびその製造方法、ならびに半導体装置 |
| US8134235B2 (en) * | 2007-04-23 | 2012-03-13 | Taiwan Semiconductor Manufacturing Co., Ltd. | Three-dimensional semiconductor device |
| KR101052870B1 (ko) * | 2008-04-21 | 2011-07-29 | 주식회사 하이닉스반도체 | 관통 전극, 이를 갖는 회로 기판, 이를 갖는 반도체 패키지및 반도체 패키지를 갖는 적층 반도체 패키지 |
| JP2009295616A (ja) | 2008-06-02 | 2009-12-17 | Philtech Inc | シリコン基板、デバイスの製造方法、デバイスおよびテスト方法 |
| US7939449B2 (en) * | 2008-06-03 | 2011-05-10 | Micron Technology, Inc. | Methods of forming hybrid conductive vias including small dimension active surface ends and larger dimension back side ends |
| US8288872B2 (en) | 2008-08-05 | 2012-10-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Through silicon via layout |
| JP2010135348A (ja) | 2008-12-02 | 2010-06-17 | Panasonic Corp | 貫通電極形成方法 |
| US8232137B2 (en) * | 2009-12-10 | 2012-07-31 | Intersil Americas Inc. | Heat conduction for chip stacks and 3-D circuits |
| US20110193212A1 (en) * | 2010-02-08 | 2011-08-11 | Qualcomm Incorporated | Systems and Methods Providing Arrangements of Vias |
-
2010
- 2010-09-09 US US12/878,542 patent/US9437561B2/en active Active
-
2011
- 2011-09-09 WO PCT/US2011/051027 patent/WO2012034034A1/en not_active Ceased
- 2011-09-09 JP JP2013528332A patent/JP6013336B2/ja active Active
- 2011-09-09 KR KR1020137007011A patent/KR101850121B1/ko active Active
- 2011-09-09 EP EP11758061.3A patent/EP2614523B1/en active Active
-
2016
- 2016-08-25 US US15/247,259 patent/US11469212B2/en active Active
-
2022
- 2022-10-11 US US17/963,729 patent/US12094853B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| WO2012034034A1 (en) | 2012-03-15 |
| US20230031099A1 (en) | 2023-02-02 |
| JP2013538460A (ja) | 2013-10-10 |
| US20160365335A1 (en) | 2016-12-15 |
| CN103098204A (zh) | 2013-05-08 |
| KR101850121B1 (ko) | 2018-04-19 |
| EP2614523B1 (en) | 2020-11-25 |
| US9437561B2 (en) | 2016-09-06 |
| EP2614523A1 (en) | 2013-07-17 |
| KR20130097766A (ko) | 2013-09-03 |
| US12094853B2 (en) | 2024-09-17 |
| US20120061821A1 (en) | 2012-03-15 |
| US11469212B2 (en) | 2022-10-11 |
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