JP5879030B2 - 電子部品パッケージ及びその製造方法 - Google Patents

電子部品パッケージ及びその製造方法 Download PDF

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Publication number
JP5879030B2
JP5879030B2 JP2010256076A JP2010256076A JP5879030B2 JP 5879030 B2 JP5879030 B2 JP 5879030B2 JP 2010256076 A JP2010256076 A JP 2010256076A JP 2010256076 A JP2010256076 A JP 2010256076A JP 5879030 B2 JP5879030 B2 JP 5879030B2
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electronic component
component package
support
layer
semiconductor chip
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JP2010256076A
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Japanese (ja)
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JP2012109350A5 (enExample
JP2012109350A (ja
Inventor
小泉　直幸
直幸 小泉
経塚　正宏
正宏 経塚
健太 内山
健太 内山
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Priority to JP2010256076A priority Critical patent/JP5879030B2/ja
Priority to US13/295,202 priority patent/US8692363B2/en
Publication of JP2012109350A publication Critical patent/JP2012109350A/ja
Publication of JP2012109350A5 publication Critical patent/JP2012109350A5/ja
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    • H10W70/614—
    • H10W70/09—
    • H10W70/60—
    • H10W72/0198—
    • H10W90/00—
    • H10W70/093—
    • H10W70/099—
    • H10W72/073—
    • H10W72/241—
    • H10W72/874—
    • H10W90/722—
    • H10W90/734—

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  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP2010256076A 2010-11-16 2010-11-16 電子部品パッケージ及びその製造方法 Active JP5879030B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2010256076A JP5879030B2 (ja) 2010-11-16 2010-11-16 電子部品パッケージ及びその製造方法
US13/295,202 US8692363B2 (en) 2010-11-16 2011-11-14 Electric part package and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010256076A JP5879030B2 (ja) 2010-11-16 2010-11-16 電子部品パッケージ及びその製造方法

Publications (3)

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JP2012109350A JP2012109350A (ja) 2012-06-07
JP2012109350A5 JP2012109350A5 (enExample) 2013-10-31
JP5879030B2 true JP5879030B2 (ja) 2016-03-08

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JP2010256076A Active JP5879030B2 (ja) 2010-11-16 2010-11-16 電子部品パッケージ及びその製造方法

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US (1) US8692363B2 (enExample)
JP (1) JP5879030B2 (enExample)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5460388B2 (ja) * 2010-03-10 2014-04-02 新光電気工業株式会社 半導体装置及びその製造方法
JP2013069807A (ja) * 2011-09-21 2013-04-18 Shinko Electric Ind Co Ltd 半導体パッケージ及びその製造方法
US9000584B2 (en) 2011-12-28 2015-04-07 Taiwan Semiconductor Manufacturing Company, Ltd. Packaged semiconductor device with a molding compound and a method of forming the same
US20130249076A1 (en) * 2012-03-20 2013-09-26 Stats Chippac, Ltd. Semiconductor Device and Method of Forming Duplex Plated Bump-On-Lead Pad Over Substrate for Finer Pitch Between Adjacent Traces
JP5903337B2 (ja) * 2012-06-08 2016-04-13 新光電気工業株式会社 半導体パッケージ及びその製造方法
US9209152B2 (en) 2013-04-19 2015-12-08 Infineon Technologies Ag Molding material and method for packaging semiconductor chips
US9305853B2 (en) * 2013-08-30 2016-04-05 Apple Inc. Ultra fine pitch PoP coreless package
US9379041B2 (en) * 2013-12-11 2016-06-28 Taiwan Semiconductor Manufacturing Company, Ltd. Fan out package structure
KR102250997B1 (ko) 2014-05-02 2021-05-12 삼성전자주식회사 반도체 패키지
JP6457206B2 (ja) * 2014-06-19 2019-01-23 株式会社ジェイデバイス 半導体パッケージ及びその製造方法
JP6417142B2 (ja) * 2014-07-23 2018-10-31 株式会社ジェイデバイス 半導体装置及びその製造方法
JP2016139648A (ja) * 2015-01-26 2016-08-04 株式会社東芝 半導体装置及びその製造方法
KR101927572B1 (ko) * 2015-03-17 2018-12-10 앰코테크놀로지코리아(주) 반도체 디바이스 및 그 제조 방법
US9728498B2 (en) * 2015-06-30 2017-08-08 Taiwan Semiconductor Manufacturing Co., Ltd. Package structure
US9941230B2 (en) * 2015-12-30 2018-04-10 International Business Machines Corporation Electrical connecting structure between a substrate and a semiconductor chip
US10068853B2 (en) * 2016-05-05 2018-09-04 Taiwan Semiconductor Manufacturing Co., Ltd. Integrated fan-out package and method of fabricating the same
US10043772B2 (en) 2016-06-23 2018-08-07 Samsung Electro-Mechanics Co., Ltd. Fan-out semiconductor package
KR102016491B1 (ko) * 2016-10-10 2019-09-02 삼성전기주식회사 팬-아웃 반도체 패키지
US10283474B2 (en) 2017-06-30 2019-05-07 Taiwan Semiconductor Manufacturing Co., Ltd. Chip package structure and method for forming the same
US10297544B2 (en) * 2017-09-26 2019-05-21 Taiwan Semiconductor Manufacturing Co., Ltd. Integrated fan-out package and method of fabricating the same
US10903136B2 (en) * 2017-11-07 2021-01-26 Tdk Taiwan Corp. Package structure having a plurality of insulating layers
US11527101B1 (en) 2021-08-11 2022-12-13 Alclear, Llc Biometric gallery management using wireless identifiers

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002100869A (ja) * 2000-09-22 2002-04-05 Meiko:Kk 回路基板、それを用いた多層回路基板、およびそれらの製造方法
JP4345679B2 (ja) * 2000-10-18 2009-10-14 日本電気株式会社 半導体装置搭載用配線基板の製造方法
US7161239B2 (en) * 2000-12-22 2007-01-09 Broadcom Corporation Ball grid array package enhanced with a thermal and electrical connector
JP2006222164A (ja) * 2005-02-08 2006-08-24 Shinko Electric Ind Co Ltd 半導体装置及びその製造方法
JP4016039B2 (ja) * 2005-06-02 2007-12-05 新光電気工業株式会社 配線基板および配線基板の製造方法
JP4714598B2 (ja) * 2006-02-22 2011-06-29 富士通株式会社 半導体装置及びその製造方法
JPWO2007126090A1 (ja) * 2006-04-27 2009-09-17 日本電気株式会社 回路基板、電子デバイス装置及び回路基板の製造方法
US20100103634A1 (en) * 2007-03-30 2010-04-29 Takuo Funaya Functional-device-embedded circuit board, method for manufacturing the same, and electronic equipment
JP5496445B2 (ja) 2007-06-08 2014-05-21 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP5314889B2 (ja) * 2007-12-27 2013-10-16 新光電気工業株式会社 電子装置及びその製造方法及び配線基板及びその製造方法
US7605018B2 (en) * 2008-01-04 2009-10-20 Powertech Technology Inc. Method for forming a die-attach layer during semiconductor packaging processes
JP5471605B2 (ja) * 2009-03-04 2014-04-16 日本電気株式会社 半導体装置及びその製造方法

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Publication number Publication date
US20120119379A1 (en) 2012-05-17
JP2012109350A (ja) 2012-06-07
US8692363B2 (en) 2014-04-08

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