JP5756515B2 - チップ部品内蔵樹脂多層基板およびその製造方法 - Google Patents

チップ部品内蔵樹脂多層基板およびその製造方法 Download PDF

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Publication number
JP5756515B2
JP5756515B2 JP2013508789A JP2013508789A JP5756515B2 JP 5756515 B2 JP5756515 B2 JP 5756515B2 JP 2013508789 A JP2013508789 A JP 2013508789A JP 2013508789 A JP2013508789 A JP 2013508789A JP 5756515 B2 JP5756515 B2 JP 5756515B2
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Japan
Prior art keywords
chip component
resin
side terminal
conductor
terminal electrode
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JP2013508789A
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Japanese (ja)
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JPWO2012137548A1 (ja
Inventor
陽一 齋藤
陽一 齋藤
亨 吉岡
亨 吉岡
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Murata Manufacturing Co Ltd
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Murata Manufacturing Co Ltd
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Priority to JP2013508789A priority Critical patent/JP5756515B2/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H05K1/186—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/184—Components including terminals inserted in holes through the printed circuit board and connected to printed contacts on the walls of the holes or at the edges thereof or protruding over or into the holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4632—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating thermoplastic or uncured resin sheets comprising printed circuits without added adhesive materials between the sheets
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15313—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06—Lamination
    • H05K2203/063—Lamination of preperforated insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H05K3/4617—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar single-sided circuit boards
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP2013508789A 2011-04-04 2012-02-20 チップ部品内蔵樹脂多層基板およびその製造方法 Active JP5756515B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2013508789A JP5756515B2 (ja) 2011-04-04 2012-02-20 チップ部品内蔵樹脂多層基板およびその製造方法

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2011082776 2011-04-04
JP2011082776 2011-04-04
PCT/JP2012/053950 WO2012137548A1 (fr) 2011-04-04 2012-02-20 Substrat multicouche à composant de puce intégré et son procédé de fabrication
JP2013508789A JP5756515B2 (ja) 2011-04-04 2012-02-20 チップ部品内蔵樹脂多層基板およびその製造方法

Publications (2)

Publication Number Publication Date
JPWO2012137548A1 JPWO2012137548A1 (ja) 2014-07-28
JP5756515B2 true JP5756515B2 (ja) 2015-07-29

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JP2013508789A Active JP5756515B2 (ja) 2011-04-04 2012-02-20 チップ部品内蔵樹脂多層基板およびその製造方法

Country Status (5)

Country Link
US (1) US10083887B2 (fr)
JP (1) JP5756515B2 (fr)
CN (1) CN103460822B (fr)
GB (1) GB2502934B (fr)
WO (1) WO2012137548A1 (fr)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5610105B1 (ja) * 2012-10-22 2014-10-22 株式会社村田製作所 電子部品内蔵モジュール
JP6205834B2 (ja) * 2013-05-14 2017-10-04 株式会社村田製作所 樹脂多層基板
JP5757375B2 (ja) * 2013-05-17 2015-07-29 株式会社村田製作所 部品内蔵多層基板の製造方法および部品内蔵多層基板
CN104254202B (zh) * 2013-06-28 2017-08-22 鹏鼎控股(深圳)股份有限公司 具有内埋电子元件的电路板及其制作方法
JP6428249B2 (ja) * 2013-12-25 2018-11-28 日亜化学工業株式会社 発光装置
WO2015156021A1 (fr) * 2014-04-10 2015-10-15 株式会社村田製作所 Substrat à composant incorporé
CN105981484B (zh) * 2014-04-10 2018-11-09 株式会社村田制作所 元器件内置多层基板
JP6304376B2 (ja) * 2014-06-18 2018-04-04 株式会社村田製作所 部品内蔵多層基板
WO2016047446A1 (fr) * 2014-09-26 2016-03-31 株式会社村田製作所 Substrat pour module empilé, module empilé, et procédé de fabrication de module empilé
WO2016080141A1 (fr) * 2014-11-17 2016-05-26 株式会社村田製作所 Substrat à composant incorporé et procédé de fabrication d'un substrat à composant incorporé
JP6156611B1 (ja) 2015-12-21 2017-07-05 株式会社村田製作所 部品内蔵デバイス、ｒｆｉｄタグ、および部品内蔵デバイスの製造方法
JP6388097B2 (ja) * 2016-05-18 2018-09-12 株式会社村田製作所 部品内蔵基板の製造方法
US10163878B2 (en) * 2017-03-24 2018-12-25 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure and method for manufacturing the same
US10700410B2 (en) * 2017-10-27 2020-06-30 Mediatek Inc. Antenna-in-package with better antenna performance
US11302656B2 (en) * 2020-07-24 2022-04-12 Qualcomm Incorporated Passive device orientation in core for improved power delivery in package
TWI777741B (zh) * 2021-08-23 2022-09-11 欣興電子股份有限公司 內埋元件基板及其製作方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0418787A (ja) * 1990-03-30 1992-01-22 Toshiba Corp 印刷配線板の接続装置
WO2010050627A1 (fr) * 2008-10-31 2010-05-06 太陽誘電株式会社 Carte de circuit imprimé et son procédé de production

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Publication number Priority date Publication date Assignee Title
JP3619395B2 (ja) * 1999-07-30 2005-02-09 京セラ株式会社 半導体素子内蔵配線基板およびその製造方法
DE60027141T2 (de) * 1999-10-26 2006-12-28 Ibiden Co., Ltd., Ogaki Gedruckte mehrschichtleiterplatte und herstellungsverfahren für gedruckte mehrschichtleiterplatte
US6538210B2 (en) 1999-12-20 2003-03-25 Matsushita Electric Industrial Co., Ltd. Circuit component built-in module, radio device having the same, and method for producing the same
JP3818030B2 (ja) 2000-07-21 2006-09-06 株式会社村田製作所 多層基板の製造方法
TW556452B (en) * 2003-01-30 2003-10-01 Phoenix Prec Technology Corp Integrated storage plate with embedded passive components and method for fabricating electronic device with the plate
WO2005004567A1 (fr) * 2003-07-04 2005-01-13 Murata Manufacturing Co., Ltd. Procede de production de substrat incorporant un composant
JP2005150553A (ja) * 2003-11-18 2005-06-09 Ngk Spark Plug Co Ltd 配線基板およびその製造方法
WO2006011508A1 (fr) * 2004-07-30 2006-02-02 Murata Manufacturing Co., Ltd. Composant électronique hybride et procédé de fabrication de celui-ci
JP2006073763A (ja) 2004-09-01 2006-03-16 Denso Corp 多層基板の製造方法
KR20070086706A (ko) * 2004-12-28 2007-08-27 니뽄 도쿠슈 도교 가부시키가이샤 배선 기판 및 배선 기판의 제조 방법
WO2007069789A1 (fr) * 2005-12-16 2007-06-21 Ibiden Co., Ltd. Plaque de cablage imprime multicouche et son procede de fabrication
TWI307946B (en) * 2006-05-24 2009-03-21 Phoenix Prec Technology Corp Stack structure of circuit board having embedded with semicondutor component
JP2008141007A (ja) 2006-12-01 2008-06-19 Denso Corp 多層基板の製造方法
JP2008166456A (ja) * 2006-12-28 2008-07-17 Toppan Printing Co Ltd 配線基板及びその製造方法
JP5136632B2 (ja) * 2010-01-08 2013-02-06 大日本印刷株式会社 電子部品

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0418787A (ja) * 1990-03-30 1992-01-22 Toshiba Corp 印刷配線板の接続装置
WO2010050627A1 (fr) * 2008-10-31 2010-05-06 太陽誘電株式会社 Carte de circuit imprimé et son procédé de production

Also Published As

Publication number Publication date
GB2502934B (en) 2015-08-12
US10083887B2 (en) 2018-09-25
CN103460822B (zh) 2016-08-10
GB2502934A (en) 2013-12-11
CN103460822A (zh) 2013-12-18
JPWO2012137548A1 (ja) 2014-07-28
US20140029222A1 (en) 2014-01-30
WO2012137548A1 (fr) 2012-10-11
GB201317492D0 (en) 2013-11-20

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