JP5715009B2 - 部品内蔵配線基板及びその製造方法 - Google Patents
部品内蔵配線基板及びその製造方法 Download PDFInfo
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- JP5715009B2 JP5715009B2 JP2011189169A JP2011189169A JP5715009B2 JP 5715009 B2 JP5715009 B2 JP 5715009B2 JP 2011189169 A JP2011189169 A JP 2011189169A JP 2011189169 A JP2011189169 A JP 2011189169A JP 5715009 B2 JP5715009 B2 JP 5715009B2
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/642—Capacitive arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
- H05K1/0231—Capacitors or dielectric substances
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0183—Dielectric layers
- H05K2201/0187—Dielectric layers with regions of different dielectrics in the same layer, e.g. in a printed capacitor for locally changing the dielectric properties
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09827—Tapered, e.g. tapered hole, via or groove
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09854—Hole or via having special cross-section, e.g. elliptical
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10015—Non-printed capacitor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10734—Ball grid array [BGA]; Bump grid array
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1461—Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
- H05K2203/1469—Circuit made after mounting or encapsulation of the components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49139—Assembling to base an electrical component, e.g., capacitor, etc. by inserting component lead or terminal into base aperture
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Description
11…コア基板
11a…収容穴部
12、13…ビルドアップ層
14…スルーホール導体
15…閉塞体
16…樹脂充填材
20、21、22、23…樹脂絶縁層
24、25…ソルダーレジスト層
30、31…導体層
32…端子パッド
33…BGA用パッド
40、41、42、43、60、61、65、66…ビア導体
50…半田バンプ
51…半田ボール
64…半田
70…コンデンサ
71…部品
100…半導体チップ
T…端子電極
Claims (7)
- 板状の部品が内蔵されてなる部品内蔵配線基板において、
前記部品には、平面視で側面部、第1の主面部、及び当該第1の主面部と対向する第2の主面部をそれぞれ有する1対の端子電極が第1の方向の両側の端部に形成され、
前記部品の前記第1及び第2の主面部の側には絶縁層と導体層とが交互に積層され、
前記部品の前記第1の主面部の側の前記絶縁層には、前記1対の端子電極のそれぞれの前記側面部及び前記第1の主面部と接続される1対の第1のビア導体が形成されるとともに、前記部品の前記第2の主面部の側の前記絶縁層には、前記1対の端子電極のそれぞれの前記側面部及び前記第2の主面部と接続される1対の第1のビア導体が形成され、
前記第1の主面部の側の前記1対の第1のビア導体と、前記第2の主面部の側の前記1対の第1のビア導体とは、互いに積層方向で対称的に配置され、
前記第1のビア導体は、積層方向において前記端子電極に近接するほどビア径が小さくなるテーパ状に形成されるとともに、前記第1の方向において前記第1又は第2の主面部との接続箇所における前記ビア径が当該接続箇所を有する前記第1又は第2の主面部の長さよりも大きく、
前記絶縁層には、前記部品の前記端子電極と接続されない一又は複数の第2のビア導体が形成され、前記第1のビア導体の前記ビア径は前記第2のビア導体のビア径よりも大きいことを特徴とする部品内蔵配線基板。 - 前記第1のビア導体の中心軸は、平面視で前記端子電極の前記側面部の直上領域に位置することを特徴とする請求項1に記載の部品内蔵配線基板。
- 前記部品は、コンデンサであることを特徴とする請求項1に記載の部品内蔵配線基板。
- 前記端子電極に対し、前記第1の方向と異なる第2の方向に並ぶ複数の前記第1のビア導体が形成されていることを特徴とする請求項1から3のいずれか一項に記載の部品内蔵配線基板。
- 前記部品は、コア基板に開口された収容穴部に収容されていることを特徴とする請求項1から4のいずれか一項に記載の部品内蔵配線基板。
- 請求項1に記載の部品内蔵配線基板の製造方法であって、
端部に前記側面部、前記第1の主面部、及び前記第2の主面部をそれぞれ有する前記1対の端子電極が形成された前記部品を用意し、基板内に前記部品を配置する部品配置工程と、
前記部品の前記第1及び第2の主面部の側に前記絶縁層を形成し、当該絶縁層の所定位置に、前記1対の端子電極のそれぞれの前記側面部及び前記第1の主面部と接続される前記1対の第1のビア導体及び前記1対の端子電極のそれぞれの前記側面部及び前記第2の主面部と接続される前記1対の第1のビア導体を、積層方向において対称的な配置で、かつ前記端子電極に近接するほどビア径が小さくなるテーパ状の断面形状で形成するビア導体形成工程と、
を含み、前記第1のビア導体は、平面視で第1の方向において、前記第1又は第2の主面部との接続箇所における前記ビア径が当該接続箇所を有する前記第1又は第2の主面部の長さよりも大きいことを特徴とする部品内蔵配線基板の製造方法。 - 前記部品配置工程では、コア基板を用意し、前記コア基板に収容穴部を形成し、前記部品を前記収容穴部に収容することを特徴とする請求項6に記載の部品内蔵配線基板の製造方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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JP2011189169A JP5715009B2 (ja) | 2011-08-31 | 2011-08-31 | 部品内蔵配線基板及びその製造方法 |
US13/599,326 US8952262B2 (en) | 2011-08-31 | 2012-08-30 | Component-incorporated wiring substrate and method of manufacturing the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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JP2011189169A JP5715009B2 (ja) | 2011-08-31 | 2011-08-31 | 部品内蔵配線基板及びその製造方法 |
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JP2013051336A JP2013051336A (ja) | 2013-03-14 |
JP5715009B2 true JP5715009B2 (ja) | 2015-05-07 |
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JP2011189169A Expired - Fee Related JP5715009B2 (ja) | 2011-08-31 | 2011-08-31 | 部品内蔵配線基板及びその製造方法 |
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JP2014192321A (ja) * | 2013-03-27 | 2014-10-06 | Ibiden Co Ltd | 電子部品内蔵配線板およびその製造方法 |
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JP3522571B2 (ja) | 1999-03-05 | 2004-04-26 | 日本特殊陶業株式会社 | 配線基板 |
US7242591B2 (en) * | 2002-10-08 | 2007-07-10 | Dai Nippon Printing Co., Ltd. | Wiring board incorporating components and process for producing the same |
JP4089902B2 (ja) | 2004-03-31 | 2008-05-28 | Tdk株式会社 | 低温焼成セラミック基板の製造方法 |
JP4028863B2 (ja) * | 2004-09-10 | 2007-12-26 | 富士通株式会社 | 基板製造方法 |
KR100598275B1 (ko) * | 2004-09-15 | 2006-07-10 | 삼성전기주식회사 | 수동소자 내장형 인쇄회로기판 및 그 제조 방법 |
KR100837147B1 (ko) * | 2004-10-29 | 2008-06-11 | 가부시키가이샤 무라타 세이사쿠쇼 | 칩형 전자 부품을 내장한 다층 기판 |
JP4697037B2 (ja) * | 2006-05-09 | 2011-06-08 | 株式会社デンソー | 部品内蔵基板及びその配線不良検査方法 |
JP5168838B2 (ja) * | 2006-07-28 | 2013-03-27 | 大日本印刷株式会社 | 多層プリント配線板及びその製造方法 |
JP4862641B2 (ja) * | 2006-12-06 | 2012-01-25 | 株式会社デンソー | 多層基板及び多層基板の製造方法 |
US8314343B2 (en) * | 2007-09-05 | 2012-11-20 | Taiyo Yuden Co., Ltd. | Multi-layer board incorporating electronic component and method for producing the same |
JP5462450B2 (ja) | 2008-05-27 | 2014-04-02 | 日本無線株式会社 | 部品内蔵プリント配線板及び部品内蔵プリント配線板の製造方法 |
JP2010199171A (ja) * | 2009-02-24 | 2010-09-09 | Shinko Electric Ind Co Ltd | チップ部品実装配線基板 |
WO2010140335A1 (ja) | 2009-06-01 | 2010-12-09 | 株式会社村田製作所 | 基板の製造方法 |
-
2011
- 2011-08-31 JP JP2011189169A patent/JP5715009B2/ja not_active Expired - Fee Related
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2012
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US8952262B2 (en) | 2015-02-10 |
US20130048361A1 (en) | 2013-02-28 |
JP2013051336A (ja) | 2013-03-14 |
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