JP5707725B2 - 薄膜のパターニング方法及び表示パネルの製造方法 - Google Patents

薄膜のパターニング方法及び表示パネルの製造方法 Download PDF

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Publication number
JP5707725B2
JP5707725B2 JP2010089307A JP2010089307A JP5707725B2 JP 5707725 B2 JP5707725 B2 JP 5707725B2 JP 2010089307 A JP2010089307 A JP 2010089307A JP 2010089307 A JP2010089307 A JP 2010089307A JP 5707725 B2 JP5707725 B2 JP 5707725B2
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Prior art keywords
layer
insulating layer
sacrificial layer
stepped portion
thin film
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Expired - Fee Related
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JP2010089307A
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Japanese (ja)
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JP2011222688A (ja
JP2011222688A5 (enExample
Inventor
良孝 田中
良孝 田中
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Casio Computer Co Ltd
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Casio Computer Co Ltd
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Priority to JP2010089307A priority Critical patent/JP5707725B2/ja
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  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)
  • Thin Film Transistor (AREA)
JP2010089307A 2010-04-08 2010-04-08 薄膜のパターニング方法及び表示パネルの製造方法 Expired - Fee Related JP5707725B2 (ja)

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JP2010089307A JP5707725B2 (ja) 2010-04-08 2010-04-08 薄膜のパターニング方法及び表示パネルの製造方法

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JP2010089307A JP5707725B2 (ja) 2010-04-08 2010-04-08 薄膜のパターニング方法及び表示パネルの製造方法

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JP2011222688A JP2011222688A (ja) 2011-11-04
JP2011222688A5 JP2011222688A5 (enExample) 2013-05-16
JP5707725B2 true JP5707725B2 (ja) 2015-04-30

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JP2010089307A Expired - Fee Related JP5707725B2 (ja) 2010-04-08 2010-04-08 薄膜のパターニング方法及び表示パネルの製造方法

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Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20140088810A (ko) 2013-01-03 2014-07-11 삼성디스플레이 주식회사 박막 트랜지스터 표시판 및 그 제조 방법
JP6436333B2 (ja) * 2013-08-06 2018-12-12 Ｔｉａｎｍａ Ｊａｐａｎ株式会社 表示装置
CN118116896A (zh) * 2022-11-30 2024-05-31 成都辰显光电有限公司 显示面板、制作方法及显示装置

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5334484A (en) * 1976-09-10 1978-03-31 Toshiba Corp Forming method for multi layer wiring
JPH069201B2 (ja) * 1984-01-11 1994-02-02 株式会社日立製作所 半導体装置用電極・配線
JPH0258222A (ja) * 1988-08-23 1990-02-27 Oki Electric Ind Co Ltd パターン形成方法
JPH04116954A (ja) * 1990-09-07 1992-04-17 Nec Corp 半導体装置の製造方法
KR930007752B1 (ko) * 1990-11-21 1993-08-18 현대전자산업 주식회사 반도체 소자의 접속장치 및 그 제조방법
JPH04349667A (ja) * 1991-05-28 1992-12-04 Toshiba Corp 半導体装置及びその製造方法
JPH05251772A (ja) * 1991-12-02 1993-09-28 Sumitomo Electric Ind Ltd 超電導多層配線およびその作製方法
JPH05234994A (ja) * 1992-02-20 1993-09-10 Seiko Epson Corp コンタクトホールの形成方法
US6111319A (en) * 1995-12-19 2000-08-29 Stmicroelectronics, Inc. Method of forming submicron contacts and vias in an integrated circuit
JPH11233620A (ja) * 1998-02-09 1999-08-27 Oki Electric Ind Co Ltd 半導体装置におけるコンタクトホール形成方法
JP2005159264A (ja) * 2003-11-06 2005-06-16 Semiconductor Leading Edge Technologies Inc パターン形成方法及び半導体装置の製造方法
JP2006303307A (ja) * 2005-04-22 2006-11-02 Toshiba Corp 半導体装置およびその製造方法

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