JP5586920B2 - フレキシブル半導体装置の作製方法 - Google Patents

フレキシブル半導体装置の作製方法 Download PDF

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Publication number
JP5586920B2
JP5586920B2 JP2009252939A JP2009252939A JP5586920B2 JP 5586920 B2 JP5586920 B2 JP 5586920B2 JP 2009252939 A JP2009252939 A JP 2009252939A JP 2009252939 A JP2009252939 A JP 2009252939A JP 5586920 B2 JP5586920 B2 JP 5586920B2
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Japan
Prior art keywords
layer
peeling
film
semiconductor element
release layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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JP2009252939A
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English (en)
Japanese (ja)
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JP2010153804A (ja
JP2010153804A5 (https=
Inventor
晋吾 江口
欣聡 及川
雅博 片山
亜美 中村
洋平 門馬
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP2009252939A priority Critical patent/JP5586920B2/ja
Publication of JP2010153804A publication Critical patent/JP2010153804A/ja
Publication of JP2010153804A5 publication Critical patent/JP2010153804A5/ja
Application granted granted Critical
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Expired - Fee Related legal-status Critical Current
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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0212—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or coating of substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0214—Manufacture or treatment of multiple TFTs using temporary substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/60—Wet etching
    • H10P50/66—Wet etching of conductive or resistive materials
    • H10P50/663—Wet etching of conductive or resistive materials by chemical means only
    • H10P50/667—Wet etching of conductive or resistive materials by chemical means only by liquid etching only

Landscapes

  • Thin Film Transistor (AREA)
  • Electroluminescent Light Sources (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
JP2009252939A 2008-11-20 2009-11-04 フレキシブル半導体装置の作製方法 Expired - Fee Related JP5586920B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009252939A JP5586920B2 (ja) 2008-11-20 2009-11-04 フレキシブル半導体装置の作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2008296369 2008-11-20
JP2008296369 2008-11-20
JP2009252939A JP5586920B2 (ja) 2008-11-20 2009-11-04 フレキシブル半導体装置の作製方法

Publications (3)

Publication Number Publication Date
JP2010153804A JP2010153804A (ja) 2010-07-08
JP2010153804A5 JP2010153804A5 (https=) 2012-12-06
JP5586920B2 true JP5586920B2 (ja) 2014-09-10

Family

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Family Applications (1)

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JP2009252939A Expired - Fee Related JP5586920B2 (ja) 2008-11-20 2009-11-04 フレキシブル半導体装置の作製方法

Country Status (5)

Country Link
US (1) US8058083B2 (https=)
JP (1) JP5586920B2 (https=)
KR (1) KR101581173B1 (https=)
CN (1) CN101740495B (https=)
TW (1) TWI487020B (https=)

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Also Published As

Publication number Publication date
US8058083B2 (en) 2011-11-15
KR101581173B1 (ko) 2015-12-30
JP2010153804A (ja) 2010-07-08
KR20100056983A (ko) 2010-05-28
TW201036056A (en) 2010-10-01
TWI487020B (zh) 2015-06-01
US20100124795A1 (en) 2010-05-20
CN101740495A (zh) 2010-06-16
CN101740495B (zh) 2014-03-12

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