JP5474127B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP5474127B2 JP5474127B2 JP2012110753A JP2012110753A JP5474127B2 JP 5474127 B2 JP5474127 B2 JP 5474127B2 JP 2012110753 A JP2012110753 A JP 2012110753A JP 2012110753 A JP2012110753 A JP 2012110753A JP 5474127 B2 JP5474127 B2 JP 5474127B2
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Description
特許文献1の半導体装置はCSP構造の一例であり、半導体チップを有機材料(樹脂)製の中継基板に接合してパッケージ化してある。中継基板には多数の貫通孔が形成され、各貫通孔の上下に半田バンプが中継基板の上下両面に露出するように設けられている。半導体チップに設けられている外部接続パッドは中継基板の半田ポストの上端に接合され、その半田ポストの下端がマザーボードのパッドに半田ボール等によって接合される。これによると、パッケージ化された半導体装置のサイズは、半導体チップの個片よりも僅かに大きい程度となるから、最小サイズのパッケージングであるかのように考えられている。
ところが、半導体チップとプリント配線基板とを上下貫通型の導電ポストを有する中継基板によって接続する従来構造では半導体チップ及びプリント配線基板の両者のパッドの形成ピッチを同一にしなくてはならない。このため、半導体チップにおける外部接続パッドの形成ピッチはプリント配線基板側のパッド形成ピッチの制約を受ける。すなわち、従来構造の半導体パッケージでは、十分に微細化された配線ルールによって形成された汎用の半導体チップを使用しようとしても、プリント配線基板側のパッド形成ピッチを半導体チップ側の外部接続パッドの形成ピッチに合致させることができないため、最新の微細な半導体チップを使用できない。すなわち、プリント配線基板側のパッド形成ピッチがボトルネックとなっているのである。このことは、プリント配線基板側の配線ルールに合致する広い線幅の半導体チップを使用しなくてはならない、または外部接続パッド群だけを広い線幅にした特別な半導体チップを設計しなくてはならないことを意味するから、同一ゲート数でもチップ面積が広くなるため、半導体チップが高価になるという問題があった。
1.半導体装置の構成
図1は、本実施形態1の半導体装置1を含んだ概略的な断面図である。この半導体装置1は、中継基板10の一方(下方)の面に1個の半導体チップ20及び複数個のポストアレイ30をリフロー半田40によって接合してパッケージ化したもので、ポストアレイ30を介してガラスエポキシ製等の有機材料(樹脂)を含む周知のプリント配線基板50に実装されている。
この誘電体層18Dは、例えば本出願人の出願に係る特開2008−141121号公報に記載されているように、誘電体層の原料となる金属酸化物を溶解した溶液を超音波振動によってエアロゾル化してキャリアガスと共に加熱しつつシリコン基板上或いはガラス基板上に供給し、シリコン基板或いはガラス基板を例えば大気中で数百度に加熱することで金属酸化物の薄膜として成膜させるエアロゾルデポジション法によって形成することが望ましい。
この製法例ではポストアレイ30を、絶縁性樹脂32と金属線34とによって製造する。絶縁性樹脂32は、図9の上下方向において金属線34を区画する層間スペーサ32Aと、左右方向において金属線34を区画する列間スペーサ32Bとからなり、熱又は紫外線により固化する周知タイプのものが使用可能である。
3.本実施形態の効果
一方、シリコン製或いはガラス製の中継基板10と、一般に樹脂製であるプリント配線基板50との間では線熱膨張率の相違が比較的大きい。しかし、本実施形態ではこれらの間はポストアレイ30によって接続することとしており、そのポストアレイ30は複数本の金属線34が中継基板10の表面に対して直交する方向に延びて形成され、かつ各金属線34が絶縁性樹脂32によって相互に絶縁された状態とされているから、金属線34群が絶縁性樹脂32と共に中継基板10の面方向に沿うように撓むことによって熱応力が吸収される。したがって、一層、半田接合部分の信頼性を高く維持することができる。
<他の実施形態>
(1)上記実施形態では、ポストアレイ30として金属線34を絶縁性樹脂32内に埋め込んだ形態のものを使用したが、本発明はこれに限らず、絶縁性樹脂によって相互に絶縁された状態となっている複数の導電路を有するものであればよく、その導電路としては金属線に限らず、金属箔であってもよい。また、金属線を使用する場合でも、銅、銅合金に限らず、アルミニウム等の低抵抗の金属材料であってもよく、多芯線を使用しても良い。
Claims (2)
- プリント配線基板に実装される半導体装置であって、
所定の半導体集積回路及びその半導体集積回路を外部回路に接続するための外部接続パッド群を備えた半導体チップと、シリコンウエハー或いはガラス基板からなる中継基板と、この中継基板の一方の表面に形成され、前記半導体チップの前記外部接続パッド群と半田を介して接続されたチップ側パッド群、このチップ側パッド群に連なって前記中継基板の外周側に展開して延びる中継配線群及び各中継配線の前記チップ側パッドとは反対側の端部に連なる中継パッド群からなる表面回路パターンと、複数の導電路が前記中継基板の表面に対して交差する方向に延びて形成され、かつ前記各導電路が絶縁性樹脂によって相互に絶縁された状態とされ、前記導電路の前記中継基板側の端部が前記中継パッドに接続され、前記導電路の前記中継基板とは反対側の端部が前記プリント基板側に接続されるポストアレイとを備え、前記表面回路パターンのチップ側パッド群は、前記外部接続パッド群と同一の数、大きさ及び形成ピッチで形成されているとともに、前記外部接続パッドに半田を介して接続され、前記中継基板のうち前記表面回路パターンを有する面には、1対の面電極の間に誘電体層を挟んだバイパスコンデンサが形成され、前記バイパスコンデンサを構成する前記面電極には、前記半導体チップのI/O用電源のための前記外部接続パッドが半田を介して接続されている、半導体装置。 - 前記半導体チップに、複数個の前記ポストアレイが互いに間隔を空けて接合されている請求項1に記載の半導体装置。
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JP2012110753A JP5474127B2 (ja) | 2012-05-14 | 2012-05-14 | 半導体装置 |
US14/005,941 US9153549B2 (en) | 2012-05-14 | 2013-02-12 | Semiconductor device |
PCT/JP2013/053218 WO2013172060A1 (ja) | 2012-05-14 | 2013-02-12 | 半導体装置 |
CN201380000972.4A CN103582945B (zh) | 2012-05-14 | 2013-02-12 | 半导体器件 |
KR1020137024769A KR101531552B1 (ko) | 2012-05-14 | 2013-02-12 | 반도체 장치 |
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KR101531552B1 (ko) | 2015-06-26 |
US20140070368A1 (en) | 2014-03-13 |
EP2704189A1 (en) | 2014-03-05 |
EP2704189B1 (en) | 2018-08-29 |
US9153549B2 (en) | 2015-10-06 |
WO2013172060A1 (ja) | 2013-11-21 |
CN103582945B (zh) | 2016-10-12 |
KR20140012680A (ko) | 2014-02-03 |
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