JP5374006B2 - 基板製造方法及び該方法によって得られた基板 - Google Patents
基板製造方法及び該方法によって得られた基板 Download PDFInfo
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- JP5374006B2 JP5374006B2 JP2002511385A JP2002511385A JP5374006B2 JP 5374006 B2 JP5374006 B2 JP 5374006B2 JP 2002511385 A JP2002511385 A JP 2002511385A JP 2002511385 A JP2002511385 A JP 2002511385A JP 5374006 B2 JP5374006 B2 JP 5374006B2
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- 239000000463 material Substances 0.000 claims abstract description 176
- 230000005693 optoelectronics Effects 0.000 claims abstract description 10
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 43
- 239000013078 crystal Substances 0.000 claims description 41
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 27
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 27
- 238000005498 polishing Methods 0.000 claims description 25
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 25
- 229910052710 silicon Inorganic materials 0.000 description 25
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Recrystallisation Techniques (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Liquid Crystal (AREA)
- Optical Integrated Circuits (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Physical Vapour Deposition (AREA)
- Laminated Bodies (AREA)
Description
第2の材料から成る支持体の表面上における第1の材料から成る要素の接合対象部位、又は第1の材料から成る活性要素の表面上における支持体への接合対象部位に、非晶質材料を形成する工程を更に備えたことと、
第2の材料が第1の材料よりも希少ではないこと、
を特徴とする基板製造方法によって、上記の目的が達成されるものである。
・結晶学的品質がより低い材料。この意味では、例えば非晶質材料は多結晶材料よりも希少ではなく、多結晶材料は単結晶材料よりも希少ではない。
・より単純及び/又はより迅速な方法によって得られる材料。この基準によれば、例えば単結晶シリコンは単結晶炭化シリコンよりも希少ではないと考えることができる。特に、単結晶シリコンは単結晶炭化シリコンよりも安価であるということに注意すべきである。
・同様に比較的単純及び/又は迅速な方法によって得られる結晶学的品質のより低い材料。例えば、一般的には比較的多くの欠陥を生じがちなより高速の引き上げ法によって得られる材料。この種の材料はまた一般に安価であり、従って希少ではないと考えられる。
・他の部分に比べて結晶学的品質がより低い材料の層や領域を含む複合材料。例えば多結晶層で被覆された単結晶基板。
・多結晶材料の層が金属不純物を捕捉する層となり得る利点。この捕捉は当業者に「ゲッターリング」として知られており、幾つか用途においては極めて有益である。
・多結晶材料の層が例えば熱処理操作時に脱ガス種を捕捉するための領域となり得る利点。
--:多くの未接合領域を含む接合不良又は部分的接合。
- :少数の未接合領域を含む部分的接合。
+ :赤外線透過で観察可能な僅かな接合欠陥しか含まない全面的接合。
++:赤外線透過で観察可能な接合欠陥を含まない全面的接合。
Claims (15)
- 単結晶ソース基板(12)の表面の単結晶材料層(10)を接合する工程を含む、光学、電子工学或いは光電子工学用のSOI基板の製造方法において、
支持体(2)は、金属不純物または熱処理工程中の脱ガス材料を捕捉する多結晶材料層(5)で被膜された単結晶材料(3)を含み、
当該方法は、接合に先立ち、前記支持体(2)の前記多結晶材料層(5)の表面上に非晶質材料層(6)を形成する工程を備え、
厚さが1000Åより薄い、酸化層のような絶縁材料層(16)が前記単結晶材料層(10)と前記非晶質材料層(6)との間に設けられており、
当該方法は、
接合の前に、前記支持体(2)と接合するために、前記単結晶ソース基板(12)の表面下に、予め定めた深さに拡がる埋込深さで原子種を埋め込む工程と、
接合の後に、埋込深さ近傍の分離深さ(14)で、前記単結晶ソース基板(12)から前記単結晶材料層(10)を分離する工程と、
を含むことを特徴とする方法。
- 非晶質材料層(6)を蒸着によって形成することを特徴とする請求項1に記載の方法。
- 非晶質材料層(6)を非晶質化処理によって形成することを特徴とする請求項1に記載の方法。
- 非晶質材料層(6)が非晶質シリコンであることを特徴とする請求項1〜3のいずれか1項に記載の方法。
- 接合の前に、前記支持体(2)上に形成された非晶質材料層(6)を研磨する工程を更に含むことを特徴とする請求項1〜4のいずれか1項に記載の方法。
- 前記研磨工程において200〜5000Å、又は1000Åの非晶質材料層(6)を除去することを特徴とする請求項5に記載の方法。
- 非晶質材料層(6)で接合された、前記支持体(2)、前記単結晶材料層(10)および前記絶縁層(16)との組合体を熱処理する工程を更に含むことを特徴とする請求項1〜6のいずれか1項に記載の方法。
- 非晶質材料層(6)を少なくとも部分的に再結晶させるのに充分な温度で熱処理工程を実施することを特徴とする請求項7に記載の方法。
- 前記支持体(2)の多結晶材料層(5)が多結晶シリコンであることを特徴とする請求項1〜8のいずれか1項に記載の方法。
- 前記支持体(2)の多結晶材料層(5)が多結晶炭化シリコンであることを特徴とする請求項1〜8のいずれか1項に記載の方法。
- 前記支持体(2)の単結晶材料(3)が単結晶シリコンで作られていることを特徴とする請求項1〜10のいずれか1項に記載の方法。
- 前記単結晶材料層(10)が単結晶シリコンで作られていることを特徴とする請求項1〜11のいずれか1項に記載の方法。
- 前記単結晶材料層(10)が単結晶炭化シリコンで作られていることを特徴とする請求項1〜11のいずれか1項に記載の方法。
- 前記非晶質材料層(6)が導電性であることを特徴とする請求項1〜13のいずれか1項に記載の方法。
- 前記非晶質材料層(6)の厚さを1000〜5000Å、又は3000Åとすることを特徴とする請求項1〜14のいずれか1項に記載の方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR00/07755 | 2000-06-16 | ||
FR0007755A FR2810448B1 (fr) | 2000-06-16 | 2000-06-16 | Procede de fabrication de substrats et substrats obtenus par ce procede |
PCT/FR2001/001876 WO2001097282A1 (fr) | 2000-06-16 | 2001-06-15 | Procede de fabrication de substrats et substrats obtenus par ce procede |
Related Child Applications (1)
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JP2012005480A Division JP5461593B2 (ja) | 2000-06-16 | 2012-01-13 | 基板製造方法及び該方法によって得られた基板 |
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JP2004503942A JP2004503942A (ja) | 2004-02-05 |
JP5374006B2 true JP5374006B2 (ja) | 2013-12-25 |
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JP2002511385A Expired - Lifetime JP5374006B2 (ja) | 2000-06-16 | 2001-06-15 | 基板製造方法及び該方法によって得られた基板 |
JP2012005480A Expired - Lifetime JP5461593B2 (ja) | 2000-06-16 | 2012-01-13 | 基板製造方法及び該方法によって得られた基板 |
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Country Status (11)
Country | Link |
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US (2) | US6936482B2 (ja) |
EP (1) | EP1292975B1 (ja) |
JP (2) | JP5374006B2 (ja) |
KR (1) | KR100738145B1 (ja) |
CN (1) | CN100349278C (ja) |
AT (1) | ATE357740T1 (ja) |
AU (1) | AU6767601A (ja) |
DE (1) | DE60127402T2 (ja) |
FR (1) | FR2810448B1 (ja) |
TW (1) | TWI266359B (ja) |
WO (1) | WO2001097282A1 (ja) |
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CN107408532A (zh) * | 2015-03-17 | 2017-11-28 | 太阳能爱迪生半导体有限公司 | 用于绝缘体上半导体结构的制造的热稳定电荷捕获层 |
CN105140107B (zh) * | 2015-08-25 | 2019-03-29 | 上海新傲科技股份有限公司 | 带有电荷陷阱和绝缘埋层衬底的制备方法 |
FR3076292B1 (fr) * | 2017-12-28 | 2020-01-03 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procede de transfert d'une couche utile sur un substrat support |
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TWI266359B (en) | 2006-11-11 |
ATE357740T1 (de) | 2007-04-15 |
CN1436369A (zh) | 2003-08-13 |
AU6767601A (en) | 2001-12-24 |
US7221038B2 (en) | 2007-05-22 |
DE60127402T2 (de) | 2007-11-29 |
DE60127402D1 (de) | 2007-05-03 |
KR100738145B1 (ko) | 2007-07-10 |
JP2004503942A (ja) | 2004-02-05 |
WO2001097282B1 (fr) | 2002-03-07 |
FR2810448B1 (fr) | 2003-09-19 |
US20030129780A1 (en) | 2003-07-10 |
JP5461593B2 (ja) | 2014-04-02 |
EP1292975B1 (fr) | 2007-03-21 |
CN100349278C (zh) | 2007-11-14 |
WO2001097282A1 (fr) | 2001-12-20 |
KR20030047900A (ko) | 2003-06-18 |
EP1292975A1 (fr) | 2003-03-19 |
US6936482B2 (en) | 2005-08-30 |
JP2012099848A (ja) | 2012-05-24 |
US20050151155A1 (en) | 2005-07-14 |
FR2810448A1 (fr) | 2001-12-21 |
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