JP5348541B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

Info

Publication number
JP5348541B2
JP5348541B2 JP2009121733A JP2009121733A JP5348541B2 JP 5348541 B2 JP5348541 B2 JP 5348541B2 JP 2009121733 A JP2009121733 A JP 2009121733A JP 2009121733 A JP2009121733 A JP 2009121733A JP 5348541 B2 JP5348541 B2 JP 5348541B2
Authority
JP
Japan
Prior art keywords
voltage
rewritable
power supply
signal
memory array
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2009121733A
Other languages
English (en)
Japanese (ja)
Other versions
JP2010272156A (ja
JP2010272156A5 (enrdf_load_stackoverflow
Inventor
孝 伊藤
由紀子 丸山
憲志 田邉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
Original Assignee
Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2009121733A priority Critical patent/JP5348541B2/ja
Publication of JP2010272156A publication Critical patent/JP2010272156A/ja
Publication of JP2010272156A5 publication Critical patent/JP2010272156A5/ja
Application granted granted Critical
Publication of JP5348541B2 publication Critical patent/JP5348541B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Read Only Memory (AREA)
JP2009121733A 2009-05-20 2009-05-20 半導体装置 Expired - Fee Related JP5348541B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009121733A JP5348541B2 (ja) 2009-05-20 2009-05-20 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009121733A JP5348541B2 (ja) 2009-05-20 2009-05-20 半導体装置

Publications (3)

Publication Number Publication Date
JP2010272156A JP2010272156A (ja) 2010-12-02
JP2010272156A5 JP2010272156A5 (enrdf_load_stackoverflow) 2012-04-12
JP5348541B2 true JP5348541B2 (ja) 2013-11-20

Family

ID=43420066

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009121733A Expired - Fee Related JP5348541B2 (ja) 2009-05-20 2009-05-20 半導体装置

Country Status (1)

Country Link
JP (1) JP5348541B2 (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012234591A (ja) * 2011-04-28 2012-11-29 Toshiba Corp 不揮発性半導体記憶装置
KR101874408B1 (ko) 2011-11-09 2018-07-05 삼성전자주식회사 비휘발성 메모리 장치 및 이를 포함하는 메모리 시스템

Family Cites Families (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02214096A (ja) * 1989-02-14 1990-08-27 Tokyo Electric Co Ltd P.romに対する書込制御回路
JPH082880Y2 (ja) * 1989-09-11 1996-01-29 横河電機株式会社 Eepromのデータ書込み装置
JP3228248B2 (ja) * 1989-12-08 2001-11-12 株式会社日立製作所 不揮発性半導体記憶装置
US4975883A (en) * 1990-03-29 1990-12-04 Intel Corporation Method and apparatus for preventing the erasure and programming of a nonvolatile memory
JPH0482094A (ja) * 1990-07-24 1992-03-16 Mitsubishi Electric Corp 不揮発性半導体記憶装置
JPH04132087A (ja) * 1990-09-21 1992-05-06 Hitachi Ltd 半導体集積回路装置
FR2694448B1 (fr) * 1992-07-31 1994-10-07 Sgs Thomson Microelectronics Dispositif de protection d'un circuit intégré contre les coupures d'alimentation.
JPH0689234A (ja) * 1992-09-07 1994-03-29 Toshiba Corp メモリモジュール
EP0631284B1 (en) * 1993-06-28 1997-09-17 STMicroelectronics S.r.l. Protection circuit for devices comprising nonvolatile memories
DE69331766D1 (de) * 1993-09-30 2002-05-02 Macronix Int Co Ltd Speisespannungsdetektorschaltung
JP4299890B2 (ja) * 1996-10-30 2009-07-22 株式会社東芝 半導体メモリ応用装置の電源供給回路
JP4302123B2 (ja) * 1997-02-26 2009-07-22 株式会社東芝 半導体集積回路装置
JPH11273370A (ja) * 1998-03-25 1999-10-08 Mitsubishi Electric Corp Icメモリ
JP3098486B2 (ja) * 1998-03-31 2000-10-16 山形日本電気株式会社 不揮発性半導体記憶装置
JP4047515B2 (ja) * 1999-05-10 2008-02-13 株式会社東芝 半導体装置
JP2001109666A (ja) * 1999-10-05 2001-04-20 Hitachi Ltd 不揮発性半導体記憶装置
JP4014801B2 (ja) * 2000-12-28 2007-11-28 株式会社ルネサステクノロジ 不揮発性メモリ装置
US6434044B1 (en) * 2001-02-16 2002-08-13 Sandisk Corporation Method and system for generation and distribution of supply voltages in memory systems
JP2004335057A (ja) * 2003-05-12 2004-11-25 Sharp Corp 誤作動防止装置付き半導体記憶装置とそれを用いた携帯電子機器
JP2005122832A (ja) * 2003-10-17 2005-05-12 Renesas Technology Corp 半導体集積回路装置
JP2006065928A (ja) * 2004-08-25 2006-03-09 Renesas Technology Corp 不揮発性半導体記憶装置および半導体集積回路装置
US7187600B2 (en) * 2004-09-22 2007-03-06 Freescale Semiconductor, Inc. Method and apparatus for protecting an integrated circuit from erroneous operation
WO2007023544A1 (ja) * 2005-08-25 2007-03-01 Spansion Llc 記憶装置、記憶装置の制御方法、および記憶制御装置の制御方法
JP2007128633A (ja) * 2005-10-07 2007-05-24 Matsushita Electric Ind Co Ltd 半導体記憶装置及びこれを備えた送受信システム
JP2008004196A (ja) * 2006-06-23 2008-01-10 Toppan Printing Co Ltd 半導体メモリ装置
JP4863865B2 (ja) * 2006-12-28 2012-01-25 富士通株式会社 情報処理装置,記憶部誤書込み防止方法,および情報処理システム
JP4996277B2 (ja) * 2007-02-09 2012-08-08 株式会社東芝 半導体記憶システム
KR100890017B1 (ko) * 2007-04-23 2009-03-25 삼성전자주식회사 프로그램 디스터브를 감소시킬 수 있는 플래시 메모리 장치및 그것의 프로그램 방법
JP2009015920A (ja) * 2007-07-02 2009-01-22 Renesas Technology Corp 不揮発性半導体記憶装置
US7724603B2 (en) * 2007-08-03 2010-05-25 Freescale Semiconductor, Inc. Method and circuit for preventing high voltage memory disturb
JP4938893B2 (ja) * 2007-08-06 2012-05-23 サンディスク コーポレイション 不揮発性メモリのための改良された書き込み中断機構

Also Published As

Publication number Publication date
JP2010272156A (ja) 2010-12-02

Similar Documents

Publication Publication Date Title
US9343176B2 (en) Low-pin-count non-volatile memory interface with soft programming capability
KR100923818B1 (ko) 퓨즈 회로와 이를 구비한 플래시 메모리 소자
JP2006012367A (ja) 不揮発性半導体記憶装置
JP2002074996A (ja) 半導体集積回路
CN103403808B (zh) 防止电源骤停造成的非易失性存储器的误动作的半导体器件
US7382676B2 (en) Method of forming a programmable voltage regulator and structure therefor
KR100395770B1 (ko) 시스템의 부트-업 메모리로서 사용 가능한 불휘발성플래시 메모리 장치 및 그의 동작 방법
KR100852179B1 (ko) 퓨즈 회로를 가지는 비휘발성 반도체 메모리 장치 및 그제어방법
TWI509618B (zh) 封裝的串列週邊介面反及閘快閃記憶體裝置及快閃記憶體裝置與其配置方法
JP5348541B2 (ja) 半導体装置
JP2003110029A (ja) 半導体装置、そのトリミング方法およびデータ記憶回路
CN113963740B (zh) 断电检测电路及半导体存储装置
KR102300824B1 (ko) 반도체 기억 장치 및 플래쉬 메모리의 동작 방법
JP4275993B2 (ja) 半導体記憶装置
CN103137206B (zh) 反熔丝控制电路
US6842371B2 (en) Permanent master block lock in a memory device
CN101399074B (zh) 集成电路中存储器电路及其控制方法
US7623403B2 (en) NAND flash memory device and method of operating the same
JP2004178672A (ja) 半導体装置およびその試験方法
TWI736248B (zh) 半導體存儲裝置及快閃記憶體的運行方法
US20080062766A1 (en) Well bias circuit in a memory device and method of operating the same
US20060152991A1 (en) Non-volatile memory storage of fuse information
US20240086275A1 (en) Non-volatile memory device
JP2954080B2 (ja) 不揮発性半導体メモリ
KR20080062079A (ko) 플래쉬 셀 퓨즈 회로 및 이를 구비한 비휘발성 반도체메모리 장치

Legal Events

Date Code Title Description
A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20120227

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20120227

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20121228

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20130108

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20130308

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20130409

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20130529

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20130723

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20130808

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

LAPS Cancellation because of no payment of annual fees