JP5309452B2 - 半導体ウエーハ及び半導体素子及び製造方法 - Google Patents

半導体ウエーハ及び半導体素子及び製造方法 Download PDF

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JP5309452B2
JP5309452B2 JP2007049792A JP2007049792A JP5309452B2 JP 5309452 B2 JP5309452 B2 JP 5309452B2 JP 2007049792 A JP2007049792 A JP 2007049792A JP 2007049792 A JP2007049792 A JP 2007049792A JP 5309452 B2 JP5309452 B2 JP 5309452B2
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buffer region
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将貴 柳原
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Sanken Electric Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/81—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation
    • H10D62/815—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW]
    • H10D62/8161—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW] potential variation due to variations in composition or crystallinity, e.g. heterojunction superlattices
    • H10D62/8162—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW] potential variation due to variations in composition or crystallinity, e.g. heterojunction superlattices having quantum effects only in the vertical direction, i.e. layered structures having quantum effects solely resulting from vertical potential variation
    • H10D62/8164—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation of structures having periodic or quasi-periodic potential variation, e.g. superlattices or multiple quantum wells [MQW] potential variation due to variations in composition or crystallinity, e.g. heterojunction superlattices having quantum effects only in the vertical direction, i.e. layered structures having quantum effects solely resulting from vertical potential variation comprising only semiconductor materials 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2902—Materials being Group IVA materials
    • H10P14/2905—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202—Materials thereof
    • H10P14/3214—Materials thereof being Group IIIA-VA semiconductors
    • H10P14/3216—Nitrides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3242—Structure
    • H10P14/3244—Layer structure
    • H10P14/3251—Layer structure consisting of three or more layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3242—Structure
    • H10P14/3244—Layer structure
    • H10P14/3251—Layer structure consisting of three or more layers
    • H10P14/3252—Alternating layers, e.g. superlattice
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3414—Deposited materials, e.g. layers characterised by the chemical composition being group IIIA-VIA materials
    • H10P14/3416—Nitrides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/815—Bodies having stress relaxation structures, e.g. buffer layers

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  • Junction Field-Effect Transistors (AREA)
  • Recrystallisation Techniques (AREA)
JP2007049792A 2007-02-28 2007-02-28 半導体ウエーハ及び半導体素子及び製造方法 Active JP5309452B2 (ja)

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JP2007049792A JP5309452B2 (ja) 2007-02-28 2007-02-28 半導体ウエーハ及び半導体素子及び製造方法
US12/038,218 US7652282B2 (en) 2007-02-28 2008-02-27 Semiconductor wafer, devices made therefrom, and method of fabrication

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JP2007049792A JP5309452B2 (ja) 2007-02-28 2007-02-28 半導体ウエーハ及び半導体素子及び製造方法

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JP2008218479A5 JP2008218479A5 (https=) 2008-11-27
JP5309452B2 true JP5309452B2 (ja) 2013-10-09

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Families Citing this family (47)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5100427B2 (ja) * 2008-02-07 2012-12-19 古河電気工業株式会社 半導体電子デバイス
JP5117283B2 (ja) * 2008-05-29 2013-01-16 古河電気工業株式会社 半導体電子デバイス
JP5053220B2 (ja) 2008-09-30 2012-10-17 古河電気工業株式会社 半導体電子デバイスおよび半導体電子デバイスの製造方法
JP4519196B2 (ja) 2008-11-27 2010-08-04 Ｄｏｗａエレクトロニクス株式会社 電子デバイス用エピタキシャル基板およびその製造方法
JP2010199441A (ja) * 2009-02-26 2010-09-09 Furukawa Electric Co Ltd:The 半導体電子デバイスおよび半導体電子デバイスの製造方法
US20100221512A1 (en) * 2009-02-27 2010-09-02 Massachusctts Institute of Technology Digital metamorphic alloys for graded buffers
JP5477685B2 (ja) * 2009-03-19 2014-04-23 サンケン電気株式会社 半導体ウェーハ及び半導体素子及びその製造方法
JP5133927B2 (ja) * 2009-03-26 2013-01-30 コバレントマテリアル株式会社 化合物半導体基板
JP5631034B2 (ja) * 2009-03-27 2014-11-26 コバレントマテリアル株式会社 窒化物半導体エピタキシャル基板
EP2498282A4 (en) * 2009-11-04 2014-06-25 Dowa Electronics Materials Co Ltd EPITACTIC COATED GROUP III NITRIDE SUBSTRATE
WO2011102045A1 (ja) * 2010-02-16 2011-08-25 日本碍子株式会社 エピタキシャル基板およびエピタキシャル基板の製造方法
WO2011102044A1 (ja) * 2010-02-16 2011-08-25 日本碍子株式会社 エピタキシャル基板およびエピタキシャル基板の製造方法
JP5689245B2 (ja) 2010-04-08 2015-03-25 パナソニック株式会社 窒化物半導体素子
CN102870195A (zh) * 2010-04-28 2013-01-09 日本碍子株式会社 外延基板以及外延基板的制造方法
CN102859653A (zh) * 2010-04-28 2013-01-02 日本碍子株式会社 外延基板以及外延基板的制造方法
JP5492984B2 (ja) 2010-04-28 2014-05-14 日本碍子株式会社 エピタキシャル基板およびエピタキシャル基板の製造方法
JP5706102B2 (ja) 2010-05-07 2015-04-22 ローム株式会社 窒化物半導体素子
JP5616443B2 (ja) * 2010-06-08 2014-10-29 日本碍子株式会社 エピタキシャル基板およびエピタキシャル基板の製造方法
DE102010027411A1 (de) * 2010-07-15 2012-01-19 Osram Opto Semiconductors Gmbh Halbleiterbauelement, Substrat und Verfahren zur Herstellung einer Halbleiterschichtenfolge
JP5810293B2 (ja) * 2010-11-19 2015-11-11 パナソニックＩｐマネジメント株式会社 窒化物半導体装置
JP5824814B2 (ja) * 2011-01-21 2015-12-02 サンケン電気株式会社 半導体ウエーハ及び半導体素子及びその製造方法
JP5648523B2 (ja) 2011-02-16 2015-01-07 富士通株式会社 半導体装置、電源装置、増幅器及び半導体装置の製造方法
JP5708187B2 (ja) 2011-04-15 2015-04-30 サンケン電気株式会社 半導体装置
KR101855063B1 (ko) * 2011-06-24 2018-05-04 엘지이노텍 주식회사 발광 소자
US9368677B2 (en) * 2011-08-01 2016-06-14 Sandia Corporation Selective layer disordering in III-nitrides with a capping layer
JP5127978B1 (ja) * 2011-09-08 2013-01-23 株式会社東芝 窒化物半導体素子、窒化物半導体ウェーハ及び窒化物半導体層の製造方法
JP5551131B2 (ja) * 2011-09-14 2014-07-16 株式会社東芝 窒化物半導体積層構造体の製造方法
GB201121666D0 (en) * 2011-12-16 2012-01-25 Element Six Ltd Synthetic diamond coated compound semiconductor substrates
JP5934575B2 (ja) 2012-05-16 2016-06-15 サンケン電気株式会社 窒化物半導体装置の製造方法
US8823025B1 (en) * 2013-02-20 2014-09-02 Translucent, Inc. III-N material grown on AIO/AIN buffer on Si substrate
KR20160037968A (ko) * 2013-07-30 2016-04-06 스미또모 가가꾸 가부시키가이샤 반도체 기판 및 반도체 기판의 제조 방법
JP2015053328A (ja) 2013-09-05 2015-03-19 富士通株式会社 半導体装置
JP2015070064A (ja) 2013-09-27 2015-04-13 富士通株式会社 半導体装置及び半導体装置の製造方法
JP2015103546A (ja) * 2013-11-21 2015-06-04 サンケン電気株式会社 半導体装置
FR3028670B1 (fr) 2014-11-18 2017-12-22 Commissariat Energie Atomique Structure semi-conductrice a couche de semi-conducteur du groupe iii-v ou ii-vi comprenant une structure cristalline a mailles cubiques ou hexagonales
JP6180401B2 (ja) * 2014-11-25 2017-08-16 サンケン電気株式会社 エピタキシャルウェーハ、半導体素子、エピタキシャルウェーハの製造方法、並びに、半導体素子の製造方法
US10109736B2 (en) * 2015-02-12 2018-10-23 Taiwan Semiconductor Manufacturing Co., Ltd. Superlattice buffer structure for gallium nitride transistors
FR3041470B1 (fr) * 2015-09-17 2017-11-17 Commissariat Energie Atomique Structure semi-conductrice a tenue en tension amelioree
CN105762247A (zh) * 2016-03-02 2016-07-13 厦门乾照光电股份有限公司 一种具有复合结构的氮化物缓冲层制作方法
CN105609603A (zh) 2016-03-02 2016-05-25 厦门乾照光电股份有限公司 一种具有复合结构的氮化物缓冲层
US10192959B2 (en) 2017-01-23 2019-01-29 Imec Vzw III-N based substrate for power electronic devices and method for manufacturing same
EP3451364B1 (en) 2017-08-28 2020-02-26 Siltronic AG Heteroepitaxial wafer and method for producing a heteroepitaxial wafer
US10516076B2 (en) 2018-02-01 2019-12-24 Silanna UV Technologies Pte Ltd Dislocation filter for semiconductor devices
FR3107051B1 (fr) * 2020-02-12 2022-10-14 Centre Nat Rech Scient Procédé de fabrication de nanostructures de nitrure d’aluminium et de gallium (AlGaN)
TWI735212B (zh) * 2020-04-24 2021-08-01 環球晶圓股份有限公司 具有超晶格疊層體的磊晶結構
WO2021243653A1 (zh) * 2020-06-04 2021-12-09 英诺赛科（珠海）科技有限公司 半导体装置及其制造方法
US20240266403A1 (en) * 2023-02-03 2024-08-08 Taiwan Semiconductor Manufacturing Company, Ltd. Buffer structure with interlayer buffer layers for high voltage device

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3237458B2 (ja) * 1995-05-12 2001-12-10 日立電線株式会社 半導体ウェハ及び半導体装置
US6462361B1 (en) * 1995-12-27 2002-10-08 Showa Denko K.K. GaInP epitaxial stacking structure and fabrication method thereof, and a FET transistor using this structure
JP3712770B2 (ja) * 1996-01-19 2005-11-02 豊田合成株式会社 ３族窒化物半導体の製造方法及び半導体素子
US6133593A (en) * 1999-07-23 2000-10-17 The United States Of America As Represented By The Secretary Of The Navy Channel design to reduce impact ionization in heterostructure field-effect transistors
JP4058590B2 (ja) * 2001-06-29 2008-03-12 サンケン電気株式会社 半導体発光素子
JP2003059948A (ja) 2001-08-20 2003-02-28 Sanken Electric Co Ltd 半導体装置及びその製造方法
US7115896B2 (en) * 2002-12-04 2006-10-03 Emcore Corporation Semiconductor structures for gallium nitride-based devices
US7332417B2 (en) * 2003-01-27 2008-02-19 Amberwave Systems Corporation Semiconductor structures with structural homogeneity
US6818061B2 (en) * 2003-04-10 2004-11-16 Honeywell International, Inc. Method for growing single crystal GaN on silicon
WO2006034025A1 (en) * 2004-09-16 2006-03-30 Arizona Board Of Regents MATERIALS AND OPTICAL DEVICES BASED ON GROUP IV QUANTUM WELLS GROWN ON Si-Ge-Sn BUFFERED SILICON
JP4826703B2 (ja) * 2004-09-29 2011-11-30 サンケン電気株式会社 半導体素子の形成に使用するための板状基体
US7321132B2 (en) * 2005-03-15 2008-01-22 Lockheed Martin Corporation Multi-layer structure for use in the fabrication of integrated circuit devices and methods for fabrication of same

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US7652282B2 (en) 2010-01-26
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