JP5156203B2 - 薄膜トランジスタ表示板及びその製造方法 - Google Patents

薄膜トランジスタ表示板及びその製造方法 Download PDF

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Publication number
JP5156203B2
JP5156203B2 JP2006191725A JP2006191725A JP5156203B2 JP 5156203 B2 JP5156203 B2 JP 5156203B2 JP 2006191725 A JP2006191725 A JP 2006191725A JP 2006191725 A JP2006191725 A JP 2006191725A JP 5156203 B2 JP5156203 B2 JP 5156203B2
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JP
Japan
Prior art keywords
conductive layer
thin film
film transistor
molybdenum
transistor array
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2006191725A
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English (en)
Japanese (ja)
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JP2007027735A (ja
JP2007027735A5 (enExample
Inventor
湘 甲 金
禹 根 李
時 烈 金
振 豪 周
彰 洙 金
尚佑 皇甫
▲皎▼ 錫 呉
慧 英 柳
洪 基 秦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Display Co Ltd
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Samsung Display Co Ltd
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Publication of JP2007027735A publication Critical patent/JP2007027735A/ja
Publication of JP2007027735A5 publication Critical patent/JP2007027735A5/ja
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • G02F1/13629Multilayer wirings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6729Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/6737Thin-film transistors [TFT] characterised by the electrodes characterised by the electrode materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/674Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741Group IV materials, e.g. germanium or silicon carbide
    • H10D30/6743Silicon
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6757Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441Interconnections, e.g. scanning lines
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2006191725A 2005-07-12 2006-07-12 薄膜トランジスタ表示板及びその製造方法 Expired - Fee Related JP5156203B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020050062730A KR101189271B1 (ko) 2005-07-12 2005-07-12 박막 트랜지스터 표시판 및 그 제조 방법
KR10-2005-0062730 2005-07-12

Publications (3)

Publication Number Publication Date
JP2007027735A JP2007027735A (ja) 2007-02-01
JP2007027735A5 JP2007027735A5 (enExample) 2009-08-27
JP5156203B2 true JP5156203B2 (ja) 2013-03-06

Family

ID=37609731

Family Applications (1)

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JP2006191725A Expired - Fee Related JP5156203B2 (ja) 2005-07-12 2006-07-12 薄膜トランジスタ表示板及びその製造方法

Country Status (5)

Country Link
US (3) US7371621B2 (enExample)
JP (1) JP5156203B2 (enExample)
KR (1) KR101189271B1 (enExample)
CN (1) CN1897285B (enExample)
TW (1) TWI402988B (enExample)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20060097381A (ko) * 2005-03-09 2006-09-14 삼성전자주식회사 박막 트랜지스터 기판 및 이의 제조 방법
KR101189271B1 (ko) * 2005-07-12 2012-10-09 삼성디스플레이 주식회사 박막 트랜지스터 표시판 및 그 제조 방법
JP5247070B2 (ja) * 2007-06-12 2013-07-24 株式会社ジャパンディスプレイウェスト 液晶表示パネル及びその製造方法
CN101593756B (zh) * 2008-05-28 2011-05-18 群康科技(深圳)有限公司 薄膜晶体管基板、薄膜晶体管基板制造方法及显示装置
US8227278B2 (en) * 2008-09-05 2012-07-24 Semiconductor Energy Laboratory Co., Ltd. Methods for manufacturing thin film transistor and display device
KR101545460B1 (ko) * 2008-09-12 2015-08-18 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 그 생산 방법
KR101628254B1 (ko) * 2009-09-21 2016-06-09 삼성디스플레이 주식회사 박막 트랜지스터 표시판 및 그의 제조 방법
US8785241B2 (en) * 2010-07-16 2014-07-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
EP2693420B1 (en) * 2011-03-30 2019-05-08 Sharp Kabushiki Kaisha Active matrix substrate, display device, and active matrix substrate manufacturing method
CN102184966B (zh) * 2011-04-15 2013-02-13 福州华映视讯有限公司 晶体管数组基板
CN102508385A (zh) * 2011-11-17 2012-06-20 华映视讯(吴江)有限公司 像素结构、阵列基板及其制作方法
WO2014054487A1 (ja) * 2012-10-02 2014-04-10 シャープ株式会社 液晶パネル、及び製造方法
US20140199833A1 (en) * 2013-01-11 2014-07-17 Applied Materials, Inc. Methods for performing a via reveal etching process for forming through-silicon vias in a substrate
CN103811327A (zh) * 2014-02-14 2014-05-21 上海和辉光电有限公司 薄膜晶体管的制作方法
CN106653772B (zh) * 2016-12-30 2019-10-01 惠科股份有限公司 一种显示面板及制程
KR102748667B1 (ko) 2019-10-30 2025-01-02 삼성디스플레이 주식회사 표시 장치, 패턴 형성 방법 및 표시 장치의 제조 방법
KR20220065949A (ko) * 2020-11-13 2022-05-23 삼성디스플레이 주식회사 표시 장치

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KR100552283B1 (ko) 1998-01-22 2006-06-23 삼성전자주식회사 몰리브덴및몰리브덴합금을이용한박막트랜지스터기판및그제조방법
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KR100904757B1 (ko) 2002-12-30 2009-06-29 엘지디스플레이 주식회사 액정표시장치 및 그의 제조방법
KR100640211B1 (ko) * 2003-04-03 2006-10-31 엘지.필립스 엘시디 주식회사 액정표시장치의 제조방법
KR101160823B1 (ko) * 2004-08-24 2012-06-29 삼성전자주식회사 박막 트랜지스터 표시판과 그 제조 방법
KR101117979B1 (ko) * 2004-12-24 2012-03-06 엘지디스플레이 주식회사 박막 트랜지스터 기판의 제조 방법
KR101189271B1 (ko) * 2005-07-12 2012-10-09 삼성디스플레이 주식회사 박막 트랜지스터 표시판 및 그 제조 방법

Also Published As

Publication number Publication date
CN1897285B (zh) 2010-05-12
KR20070008868A (ko) 2007-01-18
JP2007027735A (ja) 2007-02-01
US20080203393A1 (en) 2008-08-28
US20070012967A1 (en) 2007-01-18
US7888675B2 (en) 2011-02-15
US20100203715A1 (en) 2010-08-12
US8173493B2 (en) 2012-05-08
TW200715561A (en) 2007-04-16
CN1897285A (zh) 2007-01-17
TWI402988B (zh) 2013-07-21
KR101189271B1 (ko) 2012-10-09
US7371621B2 (en) 2008-05-13

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