JP5047518B2 - 抵抗メモリセル、及びこれを利用した抵抗メモリ配列 - Google Patents
抵抗メモリセル、及びこれを利用した抵抗メモリ配列 Download PDFInfo
- Publication number
- JP5047518B2 JP5047518B2 JP2006081592A JP2006081592A JP5047518B2 JP 5047518 B2 JP5047518 B2 JP 5047518B2 JP 2006081592 A JP2006081592 A JP 2006081592A JP 2006081592 A JP2006081592 A JP 2006081592A JP 5047518 B2 JP5047518 B2 JP 5047518B2
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- electrode
- resistive memory
- memory cell
- memory element
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/161—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/20—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/30—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
- H10B63/82—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays the switching components having a common active material layer
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
- H10B63/84—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/883—Oxides or nitrides
- H10N70/8833—Binary metal oxides, e.g. TaOx
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/883—Oxides or nitrides
- H10N70/8836—Complex metal oxides, e.g. perovskites, spinels
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1659—Cell access
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
- G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
- G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/50—Resistive cell structure aspects
- G11C2213/52—Structure characterized by the electrode material, shape, etc.
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR10-2005-0025561 | 2005-03-28 | ||
| KR1020050025561A KR100697282B1 (ko) | 2005-03-28 | 2005-03-28 | 저항 메모리 셀, 그 형성 방법 및 이를 이용한 저항 메모리배열 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2006279042A JP2006279042A (ja) | 2006-10-12 |
| JP2006279042A5 JP2006279042A5 (enExample) | 2009-01-15 |
| JP5047518B2 true JP5047518B2 (ja) | 2012-10-10 |
Family
ID=37034970
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006081592A Active JP5047518B2 (ja) | 2005-03-28 | 2006-03-23 | 抵抗メモリセル、及びこれを利用した抵抗メモリ配列 |
Country Status (3)
| Country | Link |
|---|---|
| US (4) | US7639521B2 (enExample) |
| JP (1) | JP5047518B2 (enExample) |
| KR (1) | KR100697282B1 (enExample) |
Families Citing this family (125)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7082052B2 (en) | 2004-02-06 | 2006-07-25 | Unity Semiconductor Corporation | Multi-resistive state element with reactive metal |
| US20060171200A1 (en) | 2004-02-06 | 2006-08-03 | Unity Semiconductor Corporation | Memory using mixed valence conductive oxides |
| US8937292B2 (en) | 2011-08-15 | 2015-01-20 | Unity Semiconductor Corporation | Vertical cross point arrays for ultra high density memory applications |
| US8270193B2 (en) | 2010-01-29 | 2012-09-18 | Unity Semiconductor Corporation | Local bit lines and methods of selecting the same to access memory elements in cross-point arrays |
| US8565003B2 (en) | 2011-06-28 | 2013-10-22 | Unity Semiconductor Corporation | Multilayer cross-point memory array having reduced disturb susceptibility |
| US20130082232A1 (en) | 2011-09-30 | 2013-04-04 | Unity Semiconductor Corporation | Multi Layered Conductive Metal Oxide Structures And Methods For Facilitating Enhanced Performance Characteristics Of Two Terminal Memory Cells |
| US8559209B2 (en) | 2011-06-10 | 2013-10-15 | Unity Semiconductor Corporation | Array voltage regulating technique to enable data operations on large cross-point memory arrays with resistive memory elements |
| KR100723872B1 (ko) * | 2005-06-30 | 2007-05-31 | 한국전자통신연구원 | 급격한 금속-절연체 전이를 이용한 메모리소자 및 그동작방법 |
| KR100622268B1 (ko) * | 2005-07-04 | 2006-09-11 | 한양대학교 산학협력단 | ReRAM 소자용 다층 이원산화박막의 형성방법 |
| JP4166820B2 (ja) * | 2006-03-09 | 2008-10-15 | 松下電器産業株式会社 | 抵抗変化型素子、半導体装置、およびその製造方法 |
| KR100818271B1 (ko) * | 2006-06-27 | 2008-03-31 | 삼성전자주식회사 | 펄스전압을 인가하는 비휘발성 메모리 소자의 문턱 스위칭동작 방법 |
| CN101496173B (zh) | 2006-07-27 | 2010-12-22 | 松下电器产业株式会社 | 非易失性半导体存储装置及其制造方法 |
| US7872900B2 (en) * | 2006-11-08 | 2011-01-18 | Symetrix Corporation | Correlated electron memory |
| CN101681911B (zh) * | 2006-11-08 | 2011-09-28 | 思美公司 | 关联电子存储器 |
| US7778063B2 (en) * | 2006-11-08 | 2010-08-17 | Symetrix Corporation | Non-volatile resistance switching memories and methods of making same |
| KR101206036B1 (ko) * | 2006-11-16 | 2012-11-28 | 삼성전자주식회사 | 전이 금속 고용체를 포함하는 저항성 메모리 소자 및 그제조 방법 |
| KR100801084B1 (ko) * | 2007-01-08 | 2008-02-05 | 삼성전자주식회사 | 저항체를 이용한 비휘발성 메모리 장치 및 그 제조 방법 |
| US7667220B2 (en) * | 2007-01-19 | 2010-02-23 | Macronix International Co., Ltd. | Multilevel-cell memory structures employing multi-memory with tungsten oxides and manufacturing method |
| JP2008177397A (ja) * | 2007-01-19 | 2008-07-31 | Fujitsu Ltd | 薄膜抵抗測定方法およびトンネル磁気抵抗素子の製造方法 |
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-
2005
- 2005-03-28 KR KR1020050025561A patent/KR100697282B1/ko not_active Expired - Lifetime
-
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- 2006-03-17 US US11/378,945 patent/US7639521B2/en active Active
- 2006-03-23 JP JP2006081592A patent/JP5047518B2/ja active Active
-
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-
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- 2011-05-04 US US13/100,702 patent/US20110204314A1/en not_active Abandoned
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Also Published As
| Publication number | Publication date |
|---|---|
| KR20060103705A (ko) | 2006-10-04 |
| US8873274B2 (en) | 2014-10-28 |
| KR100697282B1 (ko) | 2007-03-20 |
| US7961496B2 (en) | 2011-06-14 |
| US20060215445A1 (en) | 2006-09-28 |
| JP2006279042A (ja) | 2006-10-12 |
| US20100044666A1 (en) | 2010-02-25 |
| US20110204314A1 (en) | 2011-08-25 |
| US7639521B2 (en) | 2009-12-29 |
| US20130240826A1 (en) | 2013-09-19 |
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