JP5026400B2 - 配線基板及びその製造方法 - Google Patents

配線基板及びその製造方法 Download PDF

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Publication number
JP5026400B2
JP5026400B2 JP2008317410A JP2008317410A JP5026400B2 JP 5026400 B2 JP5026400 B2 JP 5026400B2 JP 2008317410 A JP2008317410 A JP 2008317410A JP 2008317410 A JP2008317410 A JP 2008317410A JP 5026400 B2 JP5026400 B2 JP 5026400B2
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JP
Japan
Prior art keywords
layer
pad
cavity
insulating layer
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2008317410A
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English (en)
Japanese (ja)
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JP2010141204A5 (enExample
JP2010141204A (ja
Inventor
健太郎 金子
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2008317410A priority Critical patent/JP5026400B2/ja
Priority to US12/628,281 priority patent/US8067695B2/en
Publication of JP2010141204A publication Critical patent/JP2010141204A/ja
Publication of JP2010141204A5 publication Critical patent/JP2010141204A5/ja
Application granted granted Critical
Publication of JP5026400B2 publication Critical patent/JP5026400B2/ja
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Classifications

    • H10W70/68
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4697Manufacturing multilayer circuits having cavities, e.g. for mounting components
    • H10W70/685
    • H10W90/00
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/183Components mounted in and supported by recessed areas of the printed circuit board
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/09472Recessed pad for surface mounting; Recessed electrode of component
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/09481Via in pad; Pad over filled via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10674Flip chip
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03Metal processing
    • H05K2203/0369Etching selective parts of a metal substrate through part of its thickness, e.g. using etch resist
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03Metal processing
    • H05K2203/0376Etching temporary metallic carrier substrate
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/205Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a pattern electroplated or electroformed on a metallic carrier
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4682Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
    • H10W70/635
    • H10W72/00
    • H10W74/15
    • H10W90/722
    • H10W90/724
    • H10W90/734
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T156/00Adhesive bonding and miscellaneous chemical manufacture
    • Y10T156/10Methods of surface bonding and/or assembly therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP2008317410A 2008-12-12 2008-12-12 配線基板及びその製造方法 Active JP5026400B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2008317410A JP5026400B2 (ja) 2008-12-12 2008-12-12 配線基板及びその製造方法
US12/628,281 US8067695B2 (en) 2008-12-12 2009-12-01 Wiring board and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008317410A JP5026400B2 (ja) 2008-12-12 2008-12-12 配線基板及びその製造方法

Publications (3)

Publication Number Publication Date
JP2010141204A JP2010141204A (ja) 2010-06-24
JP2010141204A5 JP2010141204A5 (enExample) 2011-10-27
JP5026400B2 true JP5026400B2 (ja) 2012-09-12

Family

ID=42239171

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008317410A Active JP5026400B2 (ja) 2008-12-12 2008-12-12 配線基板及びその製造方法

Country Status (2)

Country Link
US (1) US8067695B2 (enExample)
JP (1) JP5026400B2 (enExample)

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KR101019161B1 (ko) * 2008-12-11 2011-03-04 삼성전기주식회사 패키지 기판
JP5290215B2 (ja) * 2010-02-15 2013-09-18 ルネサスエレクトロニクス株式会社 半導体装置、半導体パッケージ、インタポーザ、及びインタポーザの製造方法
US20120152606A1 (en) * 2010-12-16 2012-06-21 Ibiden Co., Ltd. Printed wiring board
US8466559B2 (en) * 2010-12-17 2013-06-18 Intel Corporation Forming die backside coating structures with coreless packages
CN102548253B (zh) * 2010-12-28 2013-11-06 富葵精密组件(深圳)有限公司 多层电路板的制作方法
JP5649490B2 (ja) * 2011-03-16 2015-01-07 新光電気工業株式会社 配線基板及びその製造方法
JP5845855B2 (ja) * 2011-11-30 2016-01-20 株式会社ソシオネクスト 半導体装置及び半導体装置の製造方法
JP2014072372A (ja) * 2012-09-28 2014-04-21 Ibiden Co Ltd プリント配線板の製造方法及びプリント配線板
US9275925B2 (en) * 2013-03-12 2016-03-01 Taiwan Semiconductor Manufacturing Company, Ltd. System and method for an improved interconnect structure
US9263376B2 (en) * 2013-04-15 2016-02-16 Intel Deutschland Gmbh Chip interposer, semiconductor device, and method for manufacturing a semiconductor device
TW201503777A (zh) * 2013-05-30 2015-01-16 京瓷Slc技術股份有限公司 配線基板
JP2015035496A (ja) * 2013-08-09 2015-02-19 イビデン株式会社 電子部品内蔵配線板の製造方法
KR20150021342A (ko) * 2013-08-20 2015-03-02 삼성전기주식회사 다층인쇄회로기판
US9159670B2 (en) 2013-08-29 2015-10-13 Qualcomm Incorporated Ultra fine pitch and spacing interconnects for substrate
US9622350B2 (en) * 2013-09-28 2017-04-11 Intel Corporation Method of forming a circuit board
TWI666749B (zh) * 2014-02-19 2019-07-21 Siliconware Precision Industries Co., Ltd. 封裝基板及封裝結構
JP6418757B2 (ja) * 2014-03-03 2018-11-07 新光電気工業株式会社 配線基板及びその製造方法と半導体装置
TW201539596A (zh) * 2014-04-09 2015-10-16 同欣電子工業股份有限公司 中介體及其製造方法
US9609751B2 (en) 2014-04-11 2017-03-28 Qualcomm Incorporated Package substrate comprising surface interconnect and cavity comprising electroless fill
TWI504320B (zh) * 2014-06-17 2015-10-11 矽品精密工業股份有限公司 線路結構及其製法
TWI611523B (zh) * 2014-09-05 2018-01-11 矽品精密工業股份有限公司 半導體封裝件之製法
TWI551207B (zh) * 2014-09-12 2016-09-21 矽品精密工業股份有限公司 基板結構及其製法
US20160093567A1 (en) * 2014-09-26 2016-03-31 Qualcomm Incorporated System, apparatus, and method of interconnection in a substrate
JP2016162835A (ja) * 2015-02-27 2016-09-05 イビデン株式会社 多層配線板
KR102340053B1 (ko) * 2015-06-18 2021-12-16 삼성전기주식회사 인쇄회로기판 및 인쇄회로기판의 제조 방법
CN104966709B (zh) 2015-07-29 2017-11-03 恒劲科技股份有限公司 封装基板及其制作方法
JP2017084997A (ja) * 2015-10-29 2017-05-18 イビデン株式会社 プリント配線板及びその製造方法
CN107424973B (zh) * 2016-05-23 2020-01-21 凤凰先驱股份有限公司 封装基板及其制法
US11355427B2 (en) * 2016-07-01 2022-06-07 Intel Corporation Device, method and system for providing recessed interconnect structures of a substrate
US11272619B2 (en) * 2016-09-02 2022-03-08 Intel Corporation Apparatus with embedded fine line space in a cavity, and a method for forming the same
TWI595812B (zh) * 2016-11-30 2017-08-11 欣興電子股份有限公司 線路板結構及其製作方法
US9997442B1 (en) * 2016-12-14 2018-06-12 Advanced Semiconductor Engineering, Inc. Semiconductor device and method of manufacturing the same
JP6789886B2 (ja) * 2017-06-09 2020-11-25 株式会社東芝 電子装置
CN109803481B (zh) * 2017-11-17 2021-07-06 英业达科技有限公司 多层印刷电路板及制作多层印刷电路板的方法
EP3849286B1 (en) * 2020-01-09 2025-08-27 Murata Manufacturing Co., Ltd. Electronic device with differential transmission lines equipped with 3d capacitors supported by a base, and corresponding manufacturing method
KR102876502B1 (ko) 2020-07-09 2025-10-23 삼성전자주식회사 인터포저를 포함하는 반도체 패키지 및 반도체 패키지의 제조 방법
US11942386B2 (en) * 2020-08-24 2024-03-26 Texas Instruments Incorporated Electronic devices in semiconductor package cavities
US20220069489A1 (en) * 2020-08-28 2022-03-03 Unimicron Technology Corp. Circuit board structure and manufacturing method thereof
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JP7711870B2 (ja) * 2021-10-19 2025-07-23 新光電気工業株式会社 配線基板及びその製造方法
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Publication number Publication date
US20100147560A1 (en) 2010-06-17
US8067695B2 (en) 2011-11-29
JP2010141204A (ja) 2010-06-24

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