JP5001494B2 - 絶縁性基板上に形成された電界効果トランジスタ - Google Patents

絶縁性基板上に形成された電界効果トランジスタ Download PDF

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Publication number
JP5001494B2
JP5001494B2 JP2001276805A JP2001276805A JP5001494B2 JP 5001494 B2 JP5001494 B2 JP 5001494B2 JP 2001276805 A JP2001276805 A JP 2001276805A JP 2001276805 A JP2001276805 A JP 2001276805A JP 5001494 B2 JP5001494 B2 JP 5001494B2
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JP
Japan
Prior art keywords
region
thin film
semiconductor thin
insulating substrate
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2001276805A
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English (en)
Japanese (ja)
Other versions
JP2003152184A5 (enExample
JP2003152184A (ja
Inventor
豊 林
尚 長谷川
博昭 鷹巣
潤 小山内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP2001276805A priority Critical patent/JP5001494B2/ja
Priority to US10/228,847 priority patent/US7282763B2/en
Priority to TW091119429A priority patent/TW556317B/zh
Priority to KR1020020051214A priority patent/KR100919081B1/ko
Priority to CNB021443785A priority patent/CN1266750C/zh
Publication of JP2003152184A publication Critical patent/JP2003152184A/ja
Priority to KR1020070085014A priority patent/KR100922914B1/ko
Publication of JP2003152184A5 publication Critical patent/JP2003152184A5/ja
Application granted granted Critical
Publication of JP5001494B2 publication Critical patent/JP5001494B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6729Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6704Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6708Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device for preventing the kink effect or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect
    • H10D30/6711Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device for preventing the kink effect or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect by using electrodes contacting the supplementary regions or layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6729Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6733Multi-gate TFTs

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  • Thin Film Transistor (AREA)
JP2001276805A 2001-08-28 2001-09-12 絶縁性基板上に形成された電界効果トランジスタ Expired - Fee Related JP5001494B2 (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2001276805A JP5001494B2 (ja) 2001-08-28 2001-09-12 絶縁性基板上に形成された電界効果トランジスタ
TW091119429A TW556317B (en) 2001-08-28 2002-08-27 Field effect transistor formed on an insulative substrate and integrated circuit thereof
US10/228,847 US7282763B2 (en) 2001-08-28 2002-08-27 Field effect transistor formed on an insulating substrate and integrated circuit thereof
CNB021443785A CN1266750C (zh) 2001-08-28 2002-08-28 在绝缘衬底上形成的场效应晶体管以及集成电路
KR1020020051214A KR100919081B1 (ko) 2001-08-28 2002-08-28 절연 기판 상에 형성된 전계 효과 트랜지스터
KR1020070085014A KR100922914B1 (ko) 2001-08-28 2007-08-23 절연 기판 상에 형성된 전계 효과 트랜지스터

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2001258334 2001-08-28
JP2001258334 2001-08-28
JP2001-258334 2001-08-28
JP2001276805A JP5001494B2 (ja) 2001-08-28 2001-09-12 絶縁性基板上に形成された電界効果トランジスタ

Publications (3)

Publication Number Publication Date
JP2003152184A JP2003152184A (ja) 2003-05-23
JP2003152184A5 JP2003152184A5 (enExample) 2008-10-30
JP5001494B2 true JP5001494B2 (ja) 2012-08-15

Family

ID=26621140

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001276805A Expired - Fee Related JP5001494B2 (ja) 2001-08-28 2001-09-12 絶縁性基板上に形成された電界効果トランジスタ

Country Status (5)

Country Link
US (1) US7282763B2 (enExample)
JP (1) JP5001494B2 (enExample)
KR (2) KR100919081B1 (enExample)
CN (1) CN1266750C (enExample)
TW (1) TW556317B (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100542986B1 (ko) 2003-04-29 2006-01-20 삼성에스디아이 주식회사 박막 트랜지스터, 상기 박막 트랜지스터 제조 방법 및 이를 이용한 표시장치
KR100543004B1 (ko) * 2003-09-18 2006-01-20 삼성에스디아이 주식회사 평판표시장치
AU2004311154B2 (en) * 2003-11-18 2011-04-07 Board Of Regents For The Oklahoma Agricultural And Mechanical Colleges Acting For And On Behalf Of The Oklahoma State University High-temperature devices on insulator substrates
US7045873B2 (en) * 2003-12-08 2006-05-16 International Business Machines Corporation Dynamic threshold voltage MOSFET on SOI
US7084462B1 (en) 2005-04-15 2006-08-01 International Business Machines Corporation Parallel field effect transistor structure having a body contact
KR100741976B1 (ko) 2005-08-25 2007-07-23 삼성에스디아이 주식회사 박막트랜지스터 및 그 제조 방법
KR100878284B1 (ko) 2007-03-09 2009-01-12 삼성모바일디스플레이주식회사 박막트랜지스터와 그 제조 방법 및 이를 구비한유기전계발광표시장치
DE102007012380A1 (de) * 2007-03-14 2008-09-18 Austriamicrosystems Ag MOSFET mit Kanalanschluss und Verfahren zur Herstellung eines MOSFETs mit Kanalanschluss
US7652339B2 (en) * 2007-04-06 2010-01-26 Xerox Corporation Ambipolar transistor design
US8450799B2 (en) * 2007-10-22 2013-05-28 Seiko Instruments Inc. Field effect transistor formed on an insulating substrate and integrated circuit thereof
US7939865B2 (en) * 2009-01-22 2011-05-10 Honeywell International Inc. Metal semiconductor field effect transistor (MESFET) silicon-on-insulator structure having partial trench spacers
JP2011009579A (ja) * 2009-06-26 2011-01-13 Seiko Instruments Inc 絶縁性基板上の電界効果トランジスタおよびその集積回路

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2461360A1 (fr) * 1979-07-10 1981-01-30 Thomson Csf Procede de fabrication d'un transistor a effet de champ du type dmos a fonctionnement vertical et transistor obtenu par ce procede
JPS61278164A (ja) * 1985-06-03 1986-12-09 Hitachi Ltd 双方向型薄膜半導体装置
JPH04252075A (ja) * 1991-01-28 1992-09-08 Nec Corp 半導体装置およびその製造方法
EP0654829A1 (en) * 1993-11-12 1995-05-24 STMicroelectronics, Inc. Increased density MOS-gated double diffused semiconductor devices
JPH0982969A (ja) * 1995-09-12 1997-03-28 Toshiba Corp 薄膜トランジスタおよび液晶表示装置
JP3364559B2 (ja) * 1995-10-11 2003-01-08 三菱電機株式会社 半導体装置
JPH09283752A (ja) * 1996-04-12 1997-10-31 Hitachi Ltd Mis型半導体装置
TW417256B (en) * 1997-01-31 2001-01-01 Seiko Epson Corp Semiconductor MOS device and its manufacturing method
JP3379376B2 (ja) * 1997-03-14 2003-02-24 松下電器産業株式会社 電界効果トランジスタおよびそれを用いた電力増幅器
JP3216591B2 (ja) * 1997-10-29 2001-10-09 日本電気株式会社 電界効果型トランジスタ
JP2000031289A (ja) * 1998-07-08 2000-01-28 Oki Electric Ind Co Ltd 半導体集積回路装置
JP3463593B2 (ja) * 1999-03-01 2003-11-05 日本電気株式会社 電界効果型トランジスタ及びその製造方法
JP2000332250A (ja) * 1999-05-18 2000-11-30 Sony Corp 半導体装置およびその製造方法
JP3573056B2 (ja) * 1999-07-16 2004-10-06 セイコーエプソン株式会社 半導体装置、半導体ゲートアレイおよび電気光学装置および電子機器
US6441434B1 (en) * 2000-03-31 2002-08-27 Advanced Micro Devices, Inc. Semiconductor-on-insulator body-source contact and method

Also Published As

Publication number Publication date
KR20070091259A (ko) 2007-09-10
US7282763B2 (en) 2007-10-16
KR100922914B1 (ko) 2009-10-22
TW556317B (en) 2003-10-01
US20030052373A1 (en) 2003-03-20
CN1407609A (zh) 2003-04-02
CN1266750C (zh) 2006-07-26
KR20030019179A (ko) 2003-03-06
JP2003152184A (ja) 2003-05-23
KR100919081B1 (ko) 2009-09-28

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