JP4979542B2 - 実装構造体およびその製造方法 - Google Patents

実装構造体およびその製造方法 Download PDF

Info

Publication number
JP4979542B2
JP4979542B2 JP2007286840A JP2007286840A JP4979542B2 JP 4979542 B2 JP4979542 B2 JP 4979542B2 JP 2007286840 A JP2007286840 A JP 2007286840A JP 2007286840 A JP2007286840 A JP 2007286840A JP 4979542 B2 JP4979542 B2 JP 4979542B2
Authority
JP
Japan
Prior art keywords
conductor wiring
mounting structure
wiring portion
manufacturing
electronic component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2007286840A
Other languages
English (en)
Japanese (ja)
Other versions
JP2009117496A5 (https=
JP2009117496A (ja
Inventor
博之 今村
誠 森川
健太郎 西脇
かおり 矢野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP2007286840A priority Critical patent/JP4979542B2/ja
Publication of JP2009117496A publication Critical patent/JP2009117496A/ja
Publication of JP2009117496A5 publication Critical patent/JP2009117496A5/ja
Application granted granted Critical
Publication of JP4979542B2 publication Critical patent/JP4979542B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)
  • Wire Bonding (AREA)
JP2007286840A 2007-11-05 2007-11-05 実装構造体およびその製造方法 Expired - Fee Related JP4979542B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007286840A JP4979542B2 (ja) 2007-11-05 2007-11-05 実装構造体およびその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007286840A JP4979542B2 (ja) 2007-11-05 2007-11-05 実装構造体およびその製造方法

Publications (3)

Publication Number Publication Date
JP2009117496A JP2009117496A (ja) 2009-05-28
JP2009117496A5 JP2009117496A5 (https=) 2010-09-24
JP4979542B2 true JP4979542B2 (ja) 2012-07-18

Family

ID=40784316

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007286840A Expired - Fee Related JP4979542B2 (ja) 2007-11-05 2007-11-05 実装構造体およびその製造方法

Country Status (1)

Country Link
JP (1) JP4979542B2 (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6076114B2 (ja) * 2013-02-08 2017-02-08 オリンパス株式会社 半導体装置、固体撮像装置、および半導体装置の製造方法
JP2018197830A (ja) 2017-05-25 2018-12-13 スタンレー電気株式会社 発光機能を備えた透明パネル
JP7223946B2 (ja) * 2019-03-15 2023-02-17 パナソニックＩｐマネジメント株式会社 電子機器およびその製造方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5234049U (https=) * 1975-09-01 1977-03-10
JPS5714470U (https=) * 1980-06-30 1982-01-25
JPH06209151A (ja) * 1993-01-12 1994-07-26 Sumitomo Bakelite Co Ltd 印刷配線板の製造方法
JP2001203229A (ja) * 2000-01-18 2001-07-27 Seiko Epson Corp 半導体装置及びその製造方法、回路基板並びに電子機器
US6909180B2 (en) * 2000-05-12 2005-06-21 Matsushita Electric Industrial Co., Ltd. Semiconductor device, mounting circuit board, method of producing the same, and method of producing mounting structure using the same
JP2005051204A (ja) * 2003-07-16 2005-02-24 Matsushita Electric Ind Co Ltd 電気部品実装モジュールおよびその製造方法
US7743493B2 (en) * 2004-09-24 2010-06-29 Nihon University Method for manufacturing a ceramic electronic component
JP4510649B2 (ja) * 2005-01-20 2010-07-28 パナソニック株式会社 配線基板、多層基板および電子部品実装体の製造方法

Also Published As

Publication number Publication date
JP2009117496A (ja) 2009-05-28

Similar Documents

Publication Publication Date Title
KR101300384B1 (ko) 도전 재료, 도전 페이스트, 회로 기판 및 반도체 장치
JP5425589B2 (ja) 電子デバイスの製造方法
CN101529585B (zh) 电子设备的封装结构及封装制造方法
CN104064514B (zh) 半导体器件制造方法
JP4731340B2 (ja) 半導体装置の製造方法
CN108511406A (zh) 具有增强的散热性的电子组件
JP5272922B2 (ja) 半導体装置及びその製造方法
JP2011187635A (ja) 半導体装置およびその製造方法
TW201933561A (zh) 半導體元件的安裝結構及半導體元件與基板的組合
CN101156238A (zh) 电子零件连接用突起电极与使用其的电子零件安装体及这些的制造方法
CN103443915B (zh) 半导体器件
JPWO2017122306A1 (ja) 放熱板構造体、半導体装置および放熱板構造体の製造方法
JP4979542B2 (ja) 実装構造体およびその製造方法
US9196602B2 (en) High power dielectric carrier with accurate die attach layer
JP5812123B2 (ja) 電子機器の製造方法
JP2008244191A (ja) 部品内蔵基板の製造方法
JP6936595B2 (ja) 半導体装置
JP2010283215A (ja) 電子装置および電子装置を製造する方法
JP7425704B2 (ja) 半導体装置の製造方法および半導体装置
JP5169171B2 (ja) 電子部品の接合方法
JP6985599B2 (ja) 電子装置及び電子装置の製造方法
WO2017077729A1 (ja) 半導体モジュール及びその製造方法
US20250336792A1 (en) Ic package with connection pads for die
JP7502598B2 (ja) 半導体装置と半導体装置の製造方法
JP4159556B2 (ja) 半導体装置の製造方法及び接着剤

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100809

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20100809

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20111209

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20111213

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20120203

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20120321

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20120417

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20150427

Year of fee payment: 3

R151 Written notification of patent or utility model registration

Ref document number: 4979542

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R151

LAPS Cancellation because of no payment of annual fees