JP4951202B2 - シリコンオンインシュレータ構造の製造方法 - Google Patents

シリコンオンインシュレータ構造の製造方法 Download PDF

Info

Publication number
JP4951202B2
JP4951202B2 JP2004504268A JP2004504268A JP4951202B2 JP 4951202 B2 JP4951202 B2 JP 4951202B2 JP 2004504268 A JP2004504268 A JP 2004504268A JP 2004504268 A JP2004504268 A JP 2004504268A JP 4951202 B2 JP4951202 B2 JP 4951202B2
Authority
JP
Japan
Prior art keywords
layer
semiconductor
epitaxial
insulator
insulator layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP2004504268A
Other languages
English (en)
Japanese (ja)
Other versions
JP2005524987A5 (https=
JP2005524987A (ja
Inventor
クリス ワークホウブン
イボ ラアイマケルス
チャンタル アレナ
Original Assignee
エーエスエム アメリカ インコーポレイテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by エーエスエム アメリカ インコーポレイテッド filed Critical エーエスエム アメリカ インコーポレイテッド
Publication of JP2005524987A publication Critical patent/JP2005524987A/ja
Publication of JP2005524987A5 publication Critical patent/JP2005524987A5/ja
Application granted granted Critical
Publication of JP4951202B2 publication Critical patent/JP4951202B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6938—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides
    • H10P14/6939—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal
    • H10P14/69391—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal the material containing aluminium, e.g. Al2O3
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2902—Materials being Group IVA materials
    • H10P14/2905—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202—Materials thereof
    • H10P14/3204—Materials thereof being Group IVA semiconducting materials
    • H10P14/3211—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202—Materials thereof
    • H10P14/3238—Materials thereof being insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3242—Structure
    • H10P14/3244—Layer structure
    • H10P14/3248—Layer structure consisting of two layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3242—Structure
    • H10P14/3244—Layer structure
    • H10P14/3251—Layer structure consisting of three or more layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3242—Structure
    • H10P14/3244—Layer structure
    • H10P14/3254—Graded layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3242—Structure
    • H10P14/3256—Microstructure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/36—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done before the formation of the materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6544—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials to change the morphology of the insulating materials, e.g. transformation of an amorphous layer into a crystalline layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6938—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides
    • H10P14/6939—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal
    • H10P14/69396—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal the material containing at least one rare earth metal element, e.g. oxides of lanthanides, scandium or yttrium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6938—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides
    • H10P14/6939—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal
    • H10P14/69397—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal the material containing two or more metal elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1912—Preparing SOI wafers using selective deposition, e.g. epitaxial lateral overgrowth [ELO] or selective deposition of single crystal silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6339—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD

Landscapes

  • Recrystallisation Techniques (AREA)
  • Thin Film Transistor (AREA)
  • Formation Of Insulating Films (AREA)
  • Chemical Vapour Deposition (AREA)
JP2004504268A 2002-05-07 2003-05-07 シリコンオンインシュレータ構造の製造方法 Expired - Lifetime JP4951202B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US37886802P 2002-05-07 2002-05-07
US60/378,868 2002-05-07
US45501803P 2003-03-12 2003-03-12
US60/455,018 2003-03-12
PCT/US2003/014314 WO2003096385A2 (en) 2002-05-07 2003-05-07 Silicon-on-insulator structures and methods

Publications (3)

Publication Number Publication Date
JP2005524987A JP2005524987A (ja) 2005-08-18
JP2005524987A5 JP2005524987A5 (https=) 2006-06-22
JP4951202B2 true JP4951202B2 (ja) 2012-06-13

Family

ID=29423648

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004504268A Expired - Lifetime JP4951202B2 (ja) 2002-05-07 2003-05-07 シリコンオンインシュレータ構造の製造方法

Country Status (5)

Country Link
US (1) US7452757B2 (https=)
EP (1) EP1502285A2 (https=)
JP (1) JP4951202B2 (https=)
KR (1) KR101023034B1 (https=)
WO (1) WO2003096385A2 (https=)

Families Citing this family (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7192888B1 (en) * 2000-08-21 2007-03-20 Micron Technology, Inc. Low selectivity deposition methods
US6921702B2 (en) 2002-07-30 2005-07-26 Micron Technology Inc. Atomic layer deposited nanolaminates of HfO2/ZrO2 films as gate dielectrics
US7238595B2 (en) * 2003-03-13 2007-07-03 Asm America, Inc. Epitaxial semiconductor deposition methods and structures
US7682947B2 (en) * 2003-03-13 2010-03-23 Asm America, Inc. Epitaxial semiconductor deposition methods and structures
JP2007505477A (ja) * 2003-07-23 2007-03-08 エーエスエム アメリカ インコーポレイテッド シリコン−オン−インシュレーター構造及びバルク基板に対するＳｉＧｅの堆積
KR20060039915A (ko) * 2003-07-30 2006-05-09 에이에스엠 아메리카, 인코포레이티드 완화된 실리콘 게르마늄 층의 에피택셜 성장
US7601649B2 (en) 2004-08-02 2009-10-13 Micron Technology, Inc. Zirconium-doped tantalum oxide films
US7081421B2 (en) 2004-08-26 2006-07-25 Micron Technology, Inc. Lanthanide oxide dielectric layer
US7235501B2 (en) 2004-12-13 2007-06-26 Micron Technology, Inc. Lanthanum hafnium oxide dielectrics
US7662729B2 (en) 2005-04-28 2010-02-16 Micron Technology, Inc. Atomic layer deposition of a ruthenium layer to a lanthanide oxide dielectric layer
KR100676201B1 (ko) * 2005-05-24 2007-01-30 삼성전자주식회사 원자층 적층법을 이용한 반도체 디바이스 제조방법
US7572695B2 (en) 2005-05-27 2009-08-11 Micron Technology, Inc. Hafnium titanium oxide films
JP2006344865A (ja) * 2005-06-10 2006-12-21 Toyoko Kagaku Co Ltd Ｓｏｉ基板及び該基板の製造方法
US7972974B2 (en) * 2006-01-10 2011-07-05 Micron Technology, Inc. Gallium lanthanide oxide films
US7901968B2 (en) * 2006-03-23 2011-03-08 Asm America, Inc. Heteroepitaxial deposition over an oxidized surface
KR100774818B1 (ko) * 2006-08-22 2007-11-07 동부일렉트로닉스 주식회사 Ｓｏｉ기판
EP1975988B1 (en) * 2007-03-28 2015-02-25 Siltronic AG Multilayered semiconductor wafer and process for its production
JP5496540B2 (ja) * 2008-04-24 2014-05-21 株式会社半導体エネルギー研究所 半導体基板の作製方法
EP2324488B1 (en) 2008-08-27 2013-02-13 Soitec Methods of fabricating semiconductor structures or devices using layers of semiconductor material having selected or controlled lattice parameters
US8114754B2 (en) 2009-11-18 2012-02-14 S.O.I.Tec Silicon On Insulator Technologies Methods of fabricating semiconductor structures and devices using glass bonding layers, and semiconductor structures and devices formed by such methods
US8592294B2 (en) 2010-02-22 2013-11-26 Asm International N.V. High temperature atomic layer deposition of dielectric oxides
US9608119B2 (en) * 2010-03-02 2017-03-28 Micron Technology, Inc. Semiconductor-metal-on-insulator structures, methods of forming such structures, and semiconductor devices including such structures
US9646869B2 (en) 2010-03-02 2017-05-09 Micron Technology, Inc. Semiconductor devices including a diode structure over a conductive strap and methods of forming such semiconductor devices
US8288795B2 (en) 2010-03-02 2012-10-16 Micron Technology, Inc. Thyristor based memory cells, devices and systems including the same and methods for forming the same
US8507966B2 (en) 2010-03-02 2013-08-13 Micron Technology, Inc. Semiconductor cells, arrays, devices and systems having a buried conductive line and methods for forming the same
DE102010035489A1 (de) * 2010-08-26 2012-03-01 Osram Opto Semiconductors Gmbh Halbleiterbauelement und Verfahren zur Herstellung eines Halbleiterbauelement
FR2968678B1 (fr) 2010-12-08 2015-11-20 Soitec Silicon On Insulator Procédés pour former des matériaux a base de nitrure du groupe iii et structures formées par ces procédés
FR2968830B1 (fr) 2010-12-08 2014-03-21 Soitec Silicon On Insulator Couches matricielles ameliorees pour le depot heteroepitaxial de materiaux semiconducteurs de nitrure iii en utilisant des procedes hvpe
US9023721B2 (en) 2010-11-23 2015-05-05 Soitec Methods of forming bulk III-nitride materials on metal-nitride growth template layers, and structures formed by such methods
US8753942B2 (en) 2010-12-01 2014-06-17 Intel Corporation Silicon and silicon germanium nanowire structures
US8952418B2 (en) 2011-03-01 2015-02-10 Micron Technology, Inc. Gated bipolar junction transistors
US8519431B2 (en) 2011-03-08 2013-08-27 Micron Technology, Inc. Thyristors
JP5802436B2 (ja) * 2011-05-30 2015-10-28 信越半導体株式会社 貼り合わせウェーハの製造方法
US9105469B2 (en) 2011-06-30 2015-08-11 Piquant Research Llc Defect mitigation structures for semiconductor devices
US9127345B2 (en) 2012-03-06 2015-09-08 Asm America, Inc. Methods for depositing an epitaxial silicon germanium layer having a germanium to silicon ratio greater than 1:1 using silylgermane and a diluent
US9171715B2 (en) 2012-09-05 2015-10-27 Asm Ip Holding B.V. Atomic layer deposition of GeO2
CN102916039B (zh) * 2012-10-19 2016-01-20 清华大学 具有氧化铍的半导体结构
US9218963B2 (en) 2013-12-19 2015-12-22 Asm Ip Holding B.V. Cyclical deposition of germanium
MX2017016241A (es) * 2015-07-30 2018-04-20 Halliburton Energy Services Inc Elementos informaticos integrados que incorporan una capa de liberacion de tension.
KR102514785B1 (ko) * 2017-05-19 2023-03-29 상라오 징코 솔라 테크놀러지 디벨롭먼트 컴퍼니, 리미티드 태양 전지 및 이의 제조 방법
US12006570B2 (en) * 2017-08-31 2024-06-11 Uchicago Argonne, Llc Atomic layer deposition for continuous, high-speed thin films
KR102871969B1 (ko) 2024-05-14 2025-10-15 연세대학교 산학협력단 결정성 채널층을 포함하는 반도체 소자 및 이의 제조방법

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4199773A (en) * 1978-08-29 1980-04-22 Rca Corporation Insulated gate field effect silicon-on-sapphire transistor and method of making same
JPS60202952A (ja) * 1984-03-28 1985-10-14 Fujitsu Ltd 半導体装置の製造方法
JPH0618174B2 (ja) * 1986-07-08 1994-03-09 シャープ株式会社 半導体基板
JPS63305529A (ja) * 1987-06-05 1988-12-13 Nippon Telegr & Teleph Corp <Ntt> 基板およびその製造方法
JPS6436046A (en) * 1987-07-31 1989-02-07 Seiko Epson Corp Manufacture of semiconductor device
US4935382A (en) * 1987-10-30 1990-06-19 American Telephone And Telegraph Company Method of making a semiconductor-insulator-semiconductor structure
US5256550A (en) * 1988-11-29 1993-10-26 Hewlett-Packard Company Fabricating a semiconductor device with strained Si1-x Gex layer
US5310696A (en) * 1989-06-16 1994-05-10 Massachusetts Institute Of Technology Chemical method for the modification of a substrate surface to accomplish heteroepitaxial crystal growth
JPH03109299A (ja) * 1989-09-22 1991-05-09 Nippon Telegr & Teleph Corp <Ntt> 多結晶シリコン膜の形成方法
US5164359A (en) * 1990-04-20 1992-11-17 Eaton Corporation Monolithic integrated circuit having compound semiconductor layer epitaxially grown on ceramic substrate
EP0568064B1 (en) * 1992-05-01 1999-07-14 Texas Instruments Incorporated Pb/Bi-containing high-dielectric constant oxides using a non-Pb/Bi-containing perovskite as a buffer layer
US5478653A (en) * 1994-04-04 1995-12-26 Guenzer; Charles S. Bismuth titanate as a template layer for growth of crystallographically oriented silicon
JPH10144607A (ja) * 1996-11-13 1998-05-29 Hitachi Ltd 半導体基板およびその製造方法ならびにそれを用いた半導体装置およびその製造方法
JPH10265948A (ja) * 1997-03-25 1998-10-06 Rohm Co Ltd 半導体装置用基板およびその製法
CA2232796C (en) * 1997-03-26 2002-01-22 Canon Kabushiki Kaisha Thin film forming process
JPH11233440A (ja) * 1998-02-13 1999-08-27 Toshiba Corp 半導体装置
JP4439020B2 (ja) * 1998-03-26 2010-03-24 株式会社東芝 半導体記憶装置及びその製造方法
US6346732B1 (en) * 1999-05-14 2002-02-12 Kabushiki Kaisha Toshiba Semiconductor device with oxide mediated epitaxial layer
JP2001102555A (ja) 1999-09-30 2001-04-13 Seiko Epson Corp 半導体装置、薄膜トランジスタ及びそれらの製造方法
US6437375B1 (en) * 2000-06-05 2002-08-20 Micron Technology, Inc. PD-SOI substrate with suppressed floating body effect and method for its fabrication
US6583034B2 (en) * 2000-11-22 2003-06-24 Motorola, Inc. Semiconductor structure including a compliant substrate having a graded monocrystalline layer and methods for fabricating the structure and semiconductor devices including the structure
US6933566B2 (en) * 2001-07-05 2005-08-23 International Business Machines Corporation Method of forming lattice-matched structure on silicon and structure formed thereby
US6693298B2 (en) * 2001-07-20 2004-02-17 Motorola, Inc. Structure and method for fabricating epitaxial semiconductor on insulator (SOI) structures and devices utilizing the formation of a compliant substrate for materials used to form same
US6515335B1 (en) * 2002-01-04 2003-02-04 International Business Machines Corporation Method for fabrication of relaxed SiGe buffer layers on silicon-on-insulators and structures containing the same

Also Published As

Publication number Publication date
WO2003096385A3 (en) 2004-07-29
KR20050007472A (ko) 2005-01-18
US7452757B2 (en) 2008-11-18
WO2003096385A2 (en) 2003-11-20
KR101023034B1 (ko) 2011-03-24
US20040097022A1 (en) 2004-05-20
EP1502285A2 (en) 2005-02-02
JP2005524987A (ja) 2005-08-18

Similar Documents

Publication Publication Date Title
JP4951202B2 (ja) シリコンオンインシュレータ構造の製造方法
US7537804B2 (en) ALD methods in which two or more different precursors are utilized with one or more reactants to form materials over substrates
KR101427142B1 (ko) 금속 규산염 막의 원자층 증착
Koleske et al. Influence of MOVPE growth conditions on carbon and silicon concentrations in GaN
KR100385947B1 (ko) 원자층 증착 방법에 의한 박막 형성 방법
US6709989B2 (en) Method for fabricating a semiconductor structure including a metal oxide interface with silicon
KR100560654B1 (ko) 질화실리콘막을 형성을 위한 질소화합물 및 이를 이용한질화실리콘 막의 형성방법
Leskelä et al. Rare-earth oxide thin films as gate oxides in MOSFET transistors
US7202166B2 (en) Surface preparation prior to deposition on germanium
US7026219B2 (en) Integration of high k gate dielectric
EP1096042A1 (en) Method for fabricating a semiconductor structure including a metal oxide interface with silicon
JP2020084323A (ja) 周期的堆積プロセスにより基材上に遷移金属カルコゲン化物膜を堆積させる方法
US20050003662A1 (en) Methods for forming aluminum containing films utilizing amino aluminum precursors
US20080261413A1 (en) Pretreatment processes within a batch ald reactor
US11769664B2 (en) Methods for depositing a hafnium lanthanum oxide film on a substrate by a cyclical deposition process in a reaction chamber
KR20090068179A (ko) 실리콘 이산화물을 포함하는 박막의 제조 방법
KR20080044908A (ko) 트리스(디메틸아미도)실란으로 하프늄 실리케이트 물질을기상 증착하는 방법
JP2007519225A (ja) ハフニウムベースの高誘電率誘電体の原子層堆積
KR20180010994A (ko) 플라즈마 원자층 증착법을 이용한 실리콘 질화 박막의 제조방법
JPH0794506A (ja) 半導体装置の製造方法
TWI718821B (zh) 化合物、氣相沉積前驅物及製備薄膜的方法
KR100594626B1 (ko) 원자층 증착법을 이용한 질화막의 형성 방법
CN116536645A (zh) 半导体基板及其制造方法
JPH0686355B2 (ja) 第▲ｉｉｉ▼・ｖ族化合物半導体の気相成長法
JP2004200578A (ja) エピタキシャル基板及びサファイア単結晶基材

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20060502

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20060502

RD02 Notification of acceptance of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7422

Effective date: 20090807

RD03 Notification of appointment of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7423

Effective date: 20090807

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A821

Effective date: 20091207

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20091207

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20100323

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20100622

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20100629

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20100723

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20100730

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100823

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20110322

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20110621

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20110628

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20110721

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20110728

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20110822

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20120306

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20120312

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20150316

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

Ref document number: 4951202

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

S802 Written request for registration of partial abandonment of right

Free format text: JAPANESE INTERMEDIATE CODE: R311802

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313113

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

EXPY Cancellation because of completion of term