JP4917460B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP4917460B2 JP4917460B2 JP2007070133A JP2007070133A JP4917460B2 JP 4917460 B2 JP4917460 B2 JP 4917460B2 JP 2007070133 A JP2007070133 A JP 2007070133A JP 2007070133 A JP2007070133 A JP 2007070133A JP 4917460 B2 JP4917460 B2 JP 4917460B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- channel mos
- mos transistor
- transistor
- protection circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims description 36
- 230000010355 oscillation Effects 0.000 description 25
- 239000003990 capacitor Substances 0.000 description 16
- 239000013078 crystal Substances 0.000 description 10
- 230000007423 decrease Effects 0.000 description 3
- 230000002411 adverse Effects 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
- H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Mathematical Physics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computing Systems (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
- Logic Circuits (AREA)
- Oscillators With Electromechanical Resonators (AREA)
Description
以下、本発明を適用した具体的な実施の形態1について、図面を参照しながら詳細に説明する。この実施の形態1は、本発明を半導体装置の発振回路に適用したものである。
以下、本発明を適用した具体的な実施の形態2について、図面を参照しながら詳細に説明する。この実施の形態2は、実施の形態1と同様、本発明を半導体装置の発振回路に適用したものである。
101 入力端子
102 出力端子
103、105、113、122 ESD保護回路
104、111 CMOSインバータ
106、116 制御電圧生成回路
107 基準電圧生成回路
108、118 モニター回路
109、121 オペアンプ
110 水晶振動子
123 インピーダンス
124 信号源
C101、C102 コンデンサ
P101、P102、P103、P111、P112、P113、P114 PチャンネルMOSトランジスタ
N101、N102、N103、N104、N105、N111、N113 NチャネルMOSトランジスタ
R101、R102、R103 抵抗
Claims (7)
- 制御電圧により駆動力が変化する第1のトランジスタを有する保護回路と、
前記保護回路と同一の回路構成を有するモニター回路と、
前記モニター回路が出力する電圧と、基準電圧との比較結果に基づいて前記制御電圧を生成する制御電圧生成回路と、
を有する半導体装置。 - 前記保護回路は、前記第1のトランジスタと異なる導電型である第2のトランジスタを有し、
前記第1のトランジスタによって、前記第2のトランジスタのリーク電流を補償することを特徴とする請求項1に記載の半導体装置。 - 前記保護回路は、前記第1のトランジスタと並列に接続された、前記第1のトランジスタと同じ導電型の第3のトランジスタをさらに有することを特徴とする請求項1または請求項2に記載の半導体装置。
- 前記第1のトランジスタのゲート幅は、前記第3のトランジスタのゲート幅の10分の1以下であることを特徴とする請求項3に記載の半導体装置。
- 前記基準電圧は、高電位側電源電圧と低電位側電源電圧の中間の電位であることを特徴とする請求項1乃至請求項4のいずれか一に記載の半導体装置。
- トランジスタと、
制御電圧に応じて、前記トランジスタのリーク電流の通過パスを形成する調整回路と、
を有する保護回路と、
前記保護回路と同一の回路構成を有するモニター回路と、
前記モニター回路が出力する電圧と基準電圧の比較結果に基づいて制御電圧を生成する制御電圧生成回路と、
を有する半導体装置。 - 前記調整回路は、前記トランジスタのゲート幅の10分の1以下であるゲート幅を有する第4のトランジスタであることを特徴とする請求項6に記載の半導体装置。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007070133A JP4917460B2 (ja) | 2007-03-19 | 2007-03-19 | 半導体装置 |
US12/076,325 US7826186B2 (en) | 2007-03-19 | 2008-03-17 | Semiconductor device having an ESD protection circuit |
US12/926,177 US8134814B2 (en) | 2007-03-19 | 2010-10-29 | Semiconductor device having an ESD protection circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007070133A JP4917460B2 (ja) | 2007-03-19 | 2007-03-19 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2008236119A JP2008236119A (ja) | 2008-10-02 |
JP4917460B2 true JP4917460B2 (ja) | 2012-04-18 |
Family
ID=39774434
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007070133A Expired - Fee Related JP4917460B2 (ja) | 2007-03-19 | 2007-03-19 | 半導体装置 |
Country Status (2)
Country | Link |
---|---|
US (2) | US7826186B2 (ja) |
JP (1) | JP4917460B2 (ja) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5341698B2 (ja) * | 2009-09-28 | 2013-11-13 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
KR20120083610A (ko) * | 2011-01-18 | 2012-07-26 | 삼성전자주식회사 | 반도체 모듈 및 이를 포함하는 시스템 |
US8766365B2 (en) * | 2012-02-21 | 2014-07-01 | Micron Technology, Inc. | Circuit-protection devices |
US9224724B2 (en) | 2012-05-30 | 2015-12-29 | Texas Instruments Incorporated | Mutual ballasting multi-finger bidirectional ESD device |
US9625924B2 (en) * | 2015-09-22 | 2017-04-18 | Qualcomm Incorporated | Leakage current supply circuit for reducing low drop-out voltage regulator headroom |
JP6634282B2 (ja) * | 2015-12-17 | 2020-01-22 | 新日本無線株式会社 | 半導体装置 |
US10163893B1 (en) | 2017-08-28 | 2018-12-25 | Micron Technologies, Inc. | Apparatus containing circuit-protection devices |
US10431577B2 (en) | 2017-12-29 | 2019-10-01 | Micron Technology, Inc. | Methods of forming circuit-protection devices |
JP7396774B2 (ja) * | 2019-03-26 | 2023-12-12 | ラピスセミコンダクタ株式会社 | 論理回路 |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59200986A (ja) * | 1983-04-28 | 1984-11-14 | Seiko Epson Corp | アナログ電子時計 |
IT1214606B (it) * | 1985-05-13 | 1990-01-18 | Ates Componenti Elettron | Dispositivo integrato di protezione dinamica, in particolare per circuiti integrati con ingresso in tecnologia mos. |
US5579200A (en) * | 1993-01-29 | 1996-11-26 | Zilog, Inc. | Electrostatic discharge protection for metal-oxide-silicon feedback elements between pins |
US5546055A (en) * | 1995-08-24 | 1996-08-13 | Dallas Semiconductor Corp. | Crystal oscillator bias stabilizer |
JPH1032260A (ja) * | 1996-07-12 | 1998-02-03 | Yamaha Corp | 入力保護回路 |
JP3536561B2 (ja) * | 1996-12-04 | 2004-06-14 | セイコーエプソン株式会社 | 発振回路、電子回路、これらを備えた半導体装置、時計および電子機器 |
JP2000150801A (ja) * | 1998-11-18 | 2000-05-30 | Hitachi Ltd | 半導体集積回路装置 |
US6320473B1 (en) * | 1999-09-30 | 2001-11-20 | Stmicroelectronics, Inc. | Integrated oscillator circuit apparatus with capacitive coupling for reducing start-up voltage |
JP3386042B2 (ja) * | 2000-08-02 | 2003-03-10 | 日本電気株式会社 | 半導体装置 |
JP2002344251A (ja) * | 2001-05-22 | 2002-11-29 | Oki Electric Ind Co Ltd | オフリーク電流キャンセル回路 |
JP3708864B2 (ja) | 2001-10-29 | 2005-10-19 | Necマイクロシステム株式会社 | 温度補償型入力回路及び温度補償型発振回路 |
JP2004096711A (ja) * | 2002-07-10 | 2004-03-25 | Seiko Epson Corp | 発振回路、電子機器、時計 |
TWI355792B (en) * | 2003-08-29 | 2012-01-01 | Rohm Co Ltd | Power supply and electronic device having same |
JP4450631B2 (ja) * | 2004-01-06 | 2010-04-14 | 旭化成エレクトロニクス株式会社 | Esd保護機能付き信号出力回路 |
JP2005283348A (ja) * | 2004-03-30 | 2005-10-13 | Fujitsu Ltd | 半導体装置 |
JP2006059961A (ja) * | 2004-08-19 | 2006-03-02 | Toshiba Corp | 保護回路 |
JP2006237463A (ja) * | 2005-02-28 | 2006-09-07 | Matsushita Electric Ind Co Ltd | Mos型可変容量及びそれを用いた電圧制御型発振器 |
TW200705771A (en) * | 2005-06-28 | 2007-02-01 | Sanyo Electric Co | Circuit for preventing over-boosting |
JP2008131455A (ja) * | 2006-11-22 | 2008-06-05 | Matsushita Electric Ind Co Ltd | 発振回路 |
-
2007
- 2007-03-19 JP JP2007070133A patent/JP4917460B2/ja not_active Expired - Fee Related
-
2008
- 2008-03-17 US US12/076,325 patent/US7826186B2/en active Active
-
2010
- 2010-10-29 US US12/926,177 patent/US8134814B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US8134814B2 (en) | 2012-03-13 |
US20080232009A1 (en) | 2008-09-25 |
JP2008236119A (ja) | 2008-10-02 |
US20110043295A1 (en) | 2011-02-24 |
US7826186B2 (en) | 2010-11-02 |
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