JP4791034B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
- Publication number
- JP4791034B2 JP4791034B2 JP2004380704A JP2004380704A JP4791034B2 JP 4791034 B2 JP4791034 B2 JP 4791034B2 JP 2004380704 A JP2004380704 A JP 2004380704A JP 2004380704 A JP2004380704 A JP 2004380704A JP 4791034 B2 JP4791034 B2 JP 4791034B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- sic
- etching
- semiconductor device
- plasma
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
- H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
- H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H10D64/01326—Aspects related to lithography, isolation or planarisation of the conductor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
- H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
- H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
- H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/71—Etching of wafers, substrates or parts of devices using masks for conductive or resistive materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/73—Etching of wafers, substrates or parts of devices using masks for insulating materials
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/931—Silicon carbide semiconductor
Landscapes
- Drying Of Semiconductors (AREA)
- Electrodes Of Semiconductors (AREA)
- Weting (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Priority Applications (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004380704A JP4791034B2 (ja) | 2004-12-28 | 2004-12-28 | 半導体装置の製造方法 |
| US11/794,325 US7897498B2 (en) | 2004-12-28 | 2005-11-29 | Method for manufacturing semiconductor device |
| KR1020077014854A KR100845453B1 (ko) | 2004-12-28 | 2005-11-29 | 반도체 장치의 제조 방법 |
| CNB200580045165XA CN100472730C (zh) | 2004-12-28 | 2005-11-29 | 半导体装置的制造方法和制造系统 |
| EP05811466A EP1835529A4 (en) | 2004-12-28 | 2005-11-29 | METHOD FOR PRODUCING A SEMICONDUCTOR COMPONENT |
| PCT/JP2005/021868 WO2006070553A1 (ja) | 2004-12-28 | 2005-11-29 | 半導体装置の製造方法 |
| TW094146529A TW200629404A (en) | 2004-12-28 | 2005-12-26 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004380704A JP4791034B2 (ja) | 2004-12-28 | 2004-12-28 | 半導体装置の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2006186244A JP2006186244A (ja) | 2006-07-13 |
| JP4791034B2 true JP4791034B2 (ja) | 2011-10-12 |
Family
ID=36614678
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2004380704A Expired - Lifetime JP4791034B2 (ja) | 2004-12-28 | 2004-12-28 | 半導体装置の製造方法 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US7897498B2 (https=) |
| EP (1) | EP1835529A4 (https=) |
| JP (1) | JP4791034B2 (https=) |
| KR (1) | KR100845453B1 (https=) |
| CN (1) | CN100472730C (https=) |
| TW (1) | TW200629404A (https=) |
| WO (1) | WO2006070553A1 (https=) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009021550A (ja) * | 2007-07-12 | 2009-01-29 | Panasonic Corp | 半導体装置の製造方法 |
| JP5782279B2 (ja) | 2011-01-20 | 2015-09-24 | 株式会社Screenホールディングス | 基板処理方法および基板処理装置 |
| JP5801676B2 (ja) * | 2011-10-04 | 2015-10-28 | 東京エレクトロン株式会社 | 半導体装置の製造方法 |
| US20160020246A1 (en) * | 2014-07-15 | 2016-01-21 | United Microelectronics Corporation | Method for fabricating cmos image sensors and surface treating process thereof |
| JP6046757B2 (ja) * | 2014-09-30 | 2016-12-21 | 株式会社日立国際電気 | 基板処理装置、半導体装置の製造方法、プログラム |
| CN108885402B (zh) * | 2016-02-29 | 2020-01-14 | 东京毅力科创株式会社 | 选择性SiARC去除 |
| US20230028297A1 (en) * | 2021-07-23 | 2023-01-26 | Micron Technology, Inc. | Methods of forming an apparatus comprising silicon carbide materials and related microelectronic devices and systems |
| JP7329021B2 (ja) * | 2021-09-14 | 2023-08-17 | 株式会社Kokusai Electric | 半導体装置の製造方法、基板処理方法、基板処理システム、およびプログラム |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3279016B2 (ja) * | 1993-12-03 | 2002-04-30 | ソニー株式会社 | ドライエッチング方法 |
| JP3257245B2 (ja) | 1994-05-18 | 2002-02-18 | ソニー株式会社 | 微細パターンの形成方法 |
| US5762813A (en) * | 1995-03-14 | 1998-06-09 | Nippon Steel Corporation | Method for fabricating semiconductor device |
| KR100309225B1 (ko) * | 1996-01-26 | 2002-02-19 | 모리시타 요이찌 | 반도체장치의제조장치및드라이에칭방법 |
| US6316167B1 (en) | 2000-01-10 | 2001-11-13 | International Business Machines Corporation | Tunabale vapor deposited materials as antireflective coatings, hardmasks and as combined antireflective coating/hardmasks and methods of fabrication thereof and application thereof |
| US6599814B1 (en) * | 1999-05-03 | 2003-07-29 | Interuniversitair Microelektronica Centrum (Imec) | Method for removal of sic |
| JP3430091B2 (ja) | 1999-12-01 | 2003-07-28 | Necエレクトロニクス株式会社 | エッチングマスク及びエッチングマスクを用いたコンタクトホールの形成方法並びにその方法で形成した半導体装置 |
| JP2002252211A (ja) | 2001-02-23 | 2002-09-06 | Nec Corp | 半導体装置の製造方法 |
| US6777171B2 (en) * | 2001-04-20 | 2004-08-17 | Applied Materials, Inc. | Fluorine-containing layers for damascene structures |
| US6667246B2 (en) | 2001-12-04 | 2003-12-23 | Matsushita Electric Industrial Co., Ltd. | Wet-etching method and method for manufacturing semiconductor device |
| JP3727299B2 (ja) * | 2001-12-04 | 2005-12-14 | 松下電器産業株式会社 | 半導体装置の製造方法 |
| US7887711B2 (en) | 2002-06-13 | 2011-02-15 | International Business Machines Corporation | Method for etching chemically inert metal oxides |
| US6759286B2 (en) * | 2002-09-16 | 2004-07-06 | Ajay Kumar | Method of fabricating a gate structure of a field effect transistor using a hard mask |
| JP2004165555A (ja) * | 2002-11-15 | 2004-06-10 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
-
2004
- 2004-12-28 JP JP2004380704A patent/JP4791034B2/ja not_active Expired - Lifetime
-
2005
- 2005-11-29 KR KR1020077014854A patent/KR100845453B1/ko not_active Expired - Lifetime
- 2005-11-29 EP EP05811466A patent/EP1835529A4/en not_active Withdrawn
- 2005-11-29 US US11/794,325 patent/US7897498B2/en active Active
- 2005-11-29 CN CNB200580045165XA patent/CN100472730C/zh not_active Expired - Fee Related
- 2005-11-29 WO PCT/JP2005/021868 patent/WO2006070553A1/ja not_active Ceased
- 2005-12-26 TW TW094146529A patent/TW200629404A/zh not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| US20080268655A1 (en) | 2008-10-30 |
| CN100472730C (zh) | 2009-03-25 |
| US7897498B2 (en) | 2011-03-01 |
| TWI368944B (https=) | 2012-07-21 |
| CN101107698A (zh) | 2008-01-16 |
| JP2006186244A (ja) | 2006-07-13 |
| EP1835529A1 (en) | 2007-09-19 |
| TW200629404A (en) | 2006-08-16 |
| KR100845453B1 (ko) | 2008-07-10 |
| EP1835529A4 (en) | 2008-10-22 |
| KR20070086783A (ko) | 2007-08-27 |
| WO2006070553A1 (ja) | 2006-07-06 |
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