CN100472730C - 半导体装置的制造方法和制造系统 - Google Patents

半导体装置的制造方法和制造系统 Download PDF

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Publication number
CN100472730C
CN100472730C CNB200580045165XA CN200580045165A CN100472730C CN 100472730 C CN100472730 C CN 100472730C CN B200580045165X A CNB200580045165X A CN B200580045165XA CN 200580045165 A CN200580045165 A CN 200580045165A CN 100472730 C CN100472730 C CN 100472730C
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CN
China
Prior art keywords
film
semiconductor device
sic
manufacture method
high dielectric
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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CNB200580045165XA
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English (en)
Chinese (zh)
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CN101107698A (zh
Inventor
盖尔·格伦
广田良浩
村木雄介
中村源志
栉引理人
新藤尚树
清水昭贵
芦垣繁雄
加藤良裕
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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Publication date
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Publication of CN101107698A publication Critical patent/CN101107698A/zh
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Publication of CN100472730C publication Critical patent/CN100472730C/zh
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/013Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01326Aspects related to lithography, isolation or planarisation of the conductor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/71Etching of wafers, substrates or parts of devices using masks for conductive or resistive materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/73Etching of wafers, substrates or parts of devices using masks for insulating materials
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/931Silicon carbide semiconductor

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  • Drying Of Semiconductors (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Weting (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
CNB200580045165XA 2004-12-28 2005-11-29 半导体装置的制造方法和制造系统 Expired - Fee Related CN100472730C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP380704/2004 2004-12-28
JP2004380704A JP4791034B2 (ja) 2004-12-28 2004-12-28 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
CN101107698A CN101107698A (zh) 2008-01-16
CN100472730C true CN100472730C (zh) 2009-03-25

Family

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Family Applications (1)

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CNB200580045165XA Expired - Fee Related CN100472730C (zh) 2004-12-28 2005-11-29 半导体装置的制造方法和制造系统

Country Status (7)

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US (1) US7897498B2 (https=)
EP (1) EP1835529A4 (https=)
JP (1) JP4791034B2 (https=)
KR (1) KR100845453B1 (https=)
CN (1) CN100472730C (https=)
TW (1) TW200629404A (https=)
WO (1) WO2006070553A1 (https=)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009021550A (ja) * 2007-07-12 2009-01-29 Panasonic Corp 半導体装置の製造方法
JP5782279B2 (ja) 2011-01-20 2015-09-24 株式会社Screenホールディングス 基板処理方法および基板処理装置
JP5801676B2 (ja) * 2011-10-04 2015-10-28 東京エレクトロン株式会社 半導体装置の製造方法
US20160020246A1 (en) * 2014-07-15 2016-01-21 United Microelectronics Corporation Method for fabricating cmos image sensors and surface treating process thereof
JP6046757B2 (ja) * 2014-09-30 2016-12-21 株式会社日立国際電気 基板処理装置、半導体装置の製造方法、プログラム
CN108885402B (zh) * 2016-02-29 2020-01-14 东京毅力科创株式会社 选择性SiARC去除
US20230028297A1 (en) * 2021-07-23 2023-01-26 Micron Technology, Inc. Methods of forming an apparatus comprising silicon carbide materials and related microelectronic devices and systems
JP7329021B2 (ja) * 2021-09-14 2023-08-17 株式会社Kokusai Electric 半導体装置の製造方法、基板処理方法、基板処理システム、およびプログラム

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1209908A (zh) * 1996-01-26 1999-03-03 松下电子工业株式会社 半导体器件的制造装置
JP2001160547A (ja) * 1999-12-01 2001-06-12 Nec Corp エッチングマスク及びエッチングマスクを用いたコンタクトホールの形成方法並びにその方法で形成した半導体装置
JP2002252211A (ja) * 2001-02-23 2002-09-06 Nec Corp 半導体装置の製造方法
JP2003234325A (ja) * 2001-12-04 2003-08-22 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JP2004165555A (ja) * 2002-11-15 2004-06-10 Matsushita Electric Ind Co Ltd 半導体装置の製造方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3279016B2 (ja) * 1993-12-03 2002-04-30 ソニー株式会社 ドライエッチング方法
JP3257245B2 (ja) 1994-05-18 2002-02-18 ソニー株式会社 微細パターンの形成方法
US5762813A (en) * 1995-03-14 1998-06-09 Nippon Steel Corporation Method for fabricating semiconductor device
US6316167B1 (en) 2000-01-10 2001-11-13 International Business Machines Corporation Tunabale vapor deposited materials as antireflective coatings, hardmasks and as combined antireflective coating/hardmasks and methods of fabrication thereof and application thereof
US6599814B1 (en) * 1999-05-03 2003-07-29 Interuniversitair Microelektronica Centrum (Imec) Method for removal of sic
US6777171B2 (en) * 2001-04-20 2004-08-17 Applied Materials, Inc. Fluorine-containing layers for damascene structures
US6667246B2 (en) 2001-12-04 2003-12-23 Matsushita Electric Industrial Co., Ltd. Wet-etching method and method for manufacturing semiconductor device
US7887711B2 (en) 2002-06-13 2011-02-15 International Business Machines Corporation Method for etching chemically inert metal oxides
US6759286B2 (en) * 2002-09-16 2004-07-06 Ajay Kumar Method of fabricating a gate structure of a field effect transistor using a hard mask

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1209908A (zh) * 1996-01-26 1999-03-03 松下电子工业株式会社 半导体器件的制造装置
JP2001160547A (ja) * 1999-12-01 2001-06-12 Nec Corp エッチングマスク及びエッチングマスクを用いたコンタクトホールの形成方法並びにその方法で形成した半導体装置
JP2002252211A (ja) * 2001-02-23 2002-09-06 Nec Corp 半導体装置の製造方法
JP2003234325A (ja) * 2001-12-04 2003-08-22 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JP2004165555A (ja) * 2002-11-15 2004-06-10 Matsushita Electric Ind Co Ltd 半導体装置の製造方法

Also Published As

Publication number Publication date
JP4791034B2 (ja) 2011-10-12
US20080268655A1 (en) 2008-10-30
US7897498B2 (en) 2011-03-01
TWI368944B (https=) 2012-07-21
CN101107698A (zh) 2008-01-16
JP2006186244A (ja) 2006-07-13
EP1835529A1 (en) 2007-09-19
TW200629404A (en) 2006-08-16
KR100845453B1 (ko) 2008-07-10
EP1835529A4 (en) 2008-10-22
KR20070086783A (ko) 2007-08-27
WO2006070553A1 (ja) 2006-07-06

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