JP4769965B2 - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法 Download PDF

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Publication number
JP4769965B2
JP4769965B2 JP2006205930A JP2006205930A JP4769965B2 JP 4769965 B2 JP4769965 B2 JP 4769965B2 JP 2006205930 A JP2006205930 A JP 2006205930A JP 2006205930 A JP2006205930 A JP 2006205930A JP 4769965 B2 JP4769965 B2 JP 4769965B2
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JP
Japan
Prior art keywords
island
semiconductor device
sealing resin
semiconductor element
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2006205930A
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English (en)
Japanese (ja)
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JP2008034601A5 (https=
JP2008034601A (ja
Inventor
昌和 渡辺
浩司 池谷
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On Semiconductor Trading Ltd
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On Semiconductor Trading Ltd
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Publication date
Application filed by On Semiconductor Trading Ltd filed Critical On Semiconductor Trading Ltd
Priority to JP2006205930A priority Critical patent/JP4769965B2/ja
Publication of JP2008034601A publication Critical patent/JP2008034601A/ja
Publication of JP2008034601A5 publication Critical patent/JP2008034601A5/ja
Application granted granted Critical
Publication of JP4769965B2 publication Critical patent/JP4769965B2/ja
Expired - Fee Related legal-status Critical Current
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/0198Manufacture or treatment batch processes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/013Manufacture or treatment of die-attach connectors
    • H10W72/01308Manufacture or treatment of die-attach connectors using permanent auxiliary members, e.g. using alignment marks
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/931Shapes of bond pads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Die Bonding (AREA)
JP2006205930A 2006-07-28 2006-07-28 半導体装置およびその製造方法 Expired - Fee Related JP4769965B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2006205930A JP4769965B2 (ja) 2006-07-28 2006-07-28 半導体装置およびその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006205930A JP4769965B2 (ja) 2006-07-28 2006-07-28 半導体装置およびその製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2011089727A Division JP5342596B2 (ja) 2011-04-14 2011-04-14 半導体装置およびその製造方法

Publications (3)

Publication Number Publication Date
JP2008034601A JP2008034601A (ja) 2008-02-14
JP2008034601A5 JP2008034601A5 (https=) 2009-08-20
JP4769965B2 true JP4769965B2 (ja) 2011-09-07

Family

ID=39123720

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006205930A Expired - Fee Related JP4769965B2 (ja) 2006-07-28 2006-07-28 半導体装置およびその製造方法

Country Status (1)

Country Link
JP (1) JP4769965B2 (https=)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5112972B2 (ja) * 2008-06-30 2013-01-09 オンセミコンダクター・トレーディング・リミテッド 半導体装置およびその製造方法
JP2010109253A (ja) * 2008-10-31 2010-05-13 Sanyo Electric Co Ltd 半導体装置およびその製造方法
JP5216735B2 (ja) * 2009-09-30 2013-06-19 新電元工業株式会社 半導体パッケージ
JP5809440B2 (ja) * 2011-05-10 2015-11-10 ローム株式会社 Ledモジュール
JP7019957B2 (ja) * 2017-03-31 2022-02-16 富士電機株式会社 半導体装置および製造方法
EP4057339A1 (en) 2021-03-10 2022-09-14 Hitachi Energy Switzerland AG Base plate having sidewall, power semiconductor module comprising the base plate and method for producing the base plate
JP2022190980A (ja) 2021-06-15 2022-12-27 富士電機株式会社 半導体装置
JP2023102810A (ja) * 2022-01-13 2023-07-26 新電元工業株式会社 半導体装置及び半導体モジュ-ル

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5826176B2 (ja) * 1975-05-02 1983-06-01 三菱電機株式会社 樹脂封止型半導体装置
JPS6015955A (ja) * 1983-07-08 1985-01-26 Hitachi Micro Comput Eng Ltd 半導体装置
JPH0465157A (ja) * 1990-07-05 1992-03-02 Hitachi Cable Ltd パワートランジスタ用リードフレームとその製造方法
JPH05299569A (ja) * 1992-04-24 1993-11-12 Sony Corp リードフレームおよびそれを用いた樹脂封止型半導体装置
JPH0992757A (ja) * 1995-09-21 1997-04-04 Sony Corp 半導体装置
JP3422936B2 (ja) * 1998-07-17 2003-07-07 新光電気工業株式会社 リードフレーム及びその製造方法
JP2001135767A (ja) * 1999-11-01 2001-05-18 Hitachi Ltd 半導体装置およびその製造方法
JP2002009220A (ja) * 2000-06-23 2002-01-11 Hitachi Ltd 樹脂封止型半導体装置
JP3871587B2 (ja) * 2002-03-18 2007-01-24 日本インター株式会社 樹脂封止型半導体装置

Also Published As

Publication number Publication date
JP2008034601A (ja) 2008-02-14

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