JP4769965B2 - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
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- JP4769965B2 JP4769965B2 JP2006205930A JP2006205930A JP4769965B2 JP 4769965 B2 JP4769965 B2 JP 4769965B2 JP 2006205930 A JP2006205930 A JP 2006205930A JP 2006205930 A JP2006205930 A JP 2006205930A JP 4769965 B2 JP4769965 B2 JP 4769965B2
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- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
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- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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- Power Engineering (AREA)
- Die Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
本形態では、図1および図2を参照して、半導体装置10の構成および実装構造を説明する。
本形態では、第1の実施の形態にて構造を説明した半導体装置の製造方法を説明する。
本工程では、リードフレーム50を加工することにより、複数のユニット61を設ける。図3(A)はリードフレーム50全体を示す平面図であり、図3(B)は1つのユニット61を斜め上方から見た斜視図である。
本工程では、アイランド11の外周端部に突出部14を設け、更に、この突出部14を内側に曲折させる。
本工程では、アイランド11の上面に半導体素子17を実装して、半導体素子17とリード12とを金属細線18を用いて電気的に接続する。図7(A)は本工程が終了した後のアイランド11等の断面図であり、図7(B)はその斜視図である。
本工程では、半導体素子17、アイランド11およびリード12が被覆されるように封止樹脂19を形成する。図8(A)は本工程を示す断面図であり、図8(B)は本工程が終了した後のリードフレーム50を示す平面図である。
11 アイランド
11A 上面
11B 下面
11C 側面
12 リード
13 接続部
14 突出部
14A 上面
14B 下面
14C 外側側面
14D 内側側面
15 タブ
16 連結部
17 半導体素子
18 金属細線
19 封止樹脂
20 ポッティング樹脂
21 接合材
22 凹状部
23 貫通部
24 凸部
25 間隙
40 実装基板
41 導電パターン
42 固着材
50 リードフレーム
51 外枠
52 当接面
53 上金型
54 下金型
55 金型
56 当接面
57 モールド金型
58 上金型
59 下金型
60 キャビティ
61 ユニット
Claims (12)
- 半導体素子と、
上面および下面を有し、前記上面に前記半導体素子が固着されるアイランドと、
前記半導体素子と電気的に接続されるリードと、
前記半導体素子、前記アイランドおよび前記リードを被覆する封止樹脂と、
前記アイランドの外周端部を前記半導体素子側に突出させた部位であり、内側側面、外側側面、上面および下面を備えた突出部と、を具備し、
前記突出部の前記下面は前記アイランドの前記下面よりも上方に配置されると共に、前記突出部の下面と前記アイランドの側面とが成す角度は鋭角であることを特徴とする半導体装置。 - 前記アイランドの下面は前記封止樹脂から外部に露出し、
前記突出部の前記下面は前記封止樹脂により被覆されることを特徴とする請求項1に記載の半導体装置。 - 前記アイランドと連続して下面および側面が前記封止樹脂から外部に露出するタブを更に具備することを特徴とする請求項1または請求項2に記載の半導体装置。
- 前記タブと前記アイランドは連結部を経由して連結され、
前記連結部の上面を部分的に凹状に形成することを特徴とする請求項3に記載の半導体装置。 - 前記連結部の端部を上方に突出させた突出部を設けることを特徴とする請求項4に記載の半導体装置。
- 前記突出部の内側側面と前記アイランドの上面とが成す角度は鋭角であることを特徴とする請求項1から請求項5の何れかに記載の半導体装置。
- アイランドおよび前記アイランドに一端が接近するリードが設けられたリードフレームを用意する第1工程と、
前記アイランドに対してプレス加工を行い、前記アイランドの外周端部を上方に突出させた突出部を設ける第2工程と、
前記アイランドの上面に半導体素子を固着した後に、前記半導体素子と前記リードとを電気的に接続する第3工程と、
前記アイランド、前記リードおよび前記半導体素子を封止樹脂で一体に被覆する第4工程と、を具備し、
前記第2工程で形成される前記突出部は、内側側面、外側側面、上面および下面を有し、前記突出部の前記下面は、前記アイランドの下面よりも上方に配置されると共に、前記突出部の前記下面と前記アイランドの側面とが成す角度は鋭角であることを特徴とする半導体装置の製造方法。 - 前記第4工程では、前記アイランドの下面が前記封止樹脂から外部に露出すると共に、前記突出部の前記下面が前記封止樹脂により被覆されることを特徴とする請求項7に記載の半導体装置の製造方法。
- 前記第1工程では、前記アイランドに連続して延在して同一平面上に位置するタブが前記リードフレームに形成され、
前記第4工程では、前記アイランドの下面が外部に露出されると共に、前記タブの側面および下面が外部に露出されるように前記封止樹脂を形成することを特徴とする請求項7または請求項8に記載の半導体装置の製造方法。 - 前記アイランドと前記タブとは連結部を経由して連続し、
前記連結部の上面を部分的に凹状に形成することを特徴とする請求項9に記載の半導体装置の製造方法。 - 前記第3工程では、液状または半固形状の接合材を用いて前記半導体素子を前記アイランドの上面に固着することを特徴とする請求項7から請求項10の何れかに記載の半導体装置の製造方法。
- 前記突出部の内側側面と前記アイランドの上面とが成す角度を鋭角にすることを特徴とする請求項7から請求項11の何れかに記載の半導体装置の製造方法。
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JP5112972B2 (ja) * | 2008-06-30 | 2013-01-09 | オンセミコンダクター・トレーディング・リミテッド | 半導体装置およびその製造方法 |
JP2010109253A (ja) * | 2008-10-31 | 2010-05-13 | Sanyo Electric Co Ltd | 半導体装置およびその製造方法 |
JP5216735B2 (ja) * | 2009-09-30 | 2013-06-19 | 新電元工業株式会社 | 半導体パッケージ |
JP5809440B2 (ja) * | 2011-05-10 | 2015-11-10 | ローム株式会社 | Ledモジュール |
JP7019957B2 (ja) * | 2017-03-31 | 2022-02-16 | 富士電機株式会社 | 半導体装置および製造方法 |
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JPS5826176B2 (ja) * | 1975-05-02 | 1983-06-01 | 三菱電機株式会社 | 樹脂封止型半導体装置 |
JPS6015955A (ja) * | 1983-07-08 | 1985-01-26 | Hitachi Micro Comput Eng Ltd | 半導体装置 |
JPH0465157A (ja) * | 1990-07-05 | 1992-03-02 | Hitachi Cable Ltd | パワートランジスタ用リードフレームとその製造方法 |
JPH05299569A (ja) * | 1992-04-24 | 1993-11-12 | Sony Corp | リードフレームおよびそれを用いた樹脂封止型半導体装置 |
JPH0992757A (ja) * | 1995-09-21 | 1997-04-04 | Sony Corp | 半導体装置 |
JP3422936B2 (ja) * | 1998-07-17 | 2003-07-07 | 新光電気工業株式会社 | リードフレーム及びその製造方法 |
JP2001135767A (ja) * | 1999-11-01 | 2001-05-18 | Hitachi Ltd | 半導体装置およびその製造方法 |
JP2002009220A (ja) * | 2000-06-23 | 2002-01-11 | Hitachi Ltd | 樹脂封止型半導体装置 |
JP3871587B2 (ja) * | 2002-03-18 | 2007-01-24 | 日本インター株式会社 | 樹脂封止型半導体装置 |
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