JP4619060B2 - 半導体装置の作製方法 - Google Patents
半導体装置の作製方法 Download PDFInfo
- Publication number
- JP4619060B2 JP4619060B2 JP2004235723A JP2004235723A JP4619060B2 JP 4619060 B2 JP4619060 B2 JP 4619060B2 JP 2004235723 A JP2004235723 A JP 2004235723A JP 2004235723 A JP2004235723 A JP 2004235723A JP 4619060 B2 JP4619060 B2 JP 4619060B2
- Authority
- JP
- Japan
- Prior art keywords
- conductor
- insulator
- semiconductor
- composition
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Thin Film Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004235723A JP4619060B2 (ja) | 2003-08-15 | 2004-08-13 | 半導体装置の作製方法 |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003294021 | 2003-08-15 | ||
| JP2004235723A JP4619060B2 (ja) | 2003-08-15 | 2004-08-13 | 半導体装置の作製方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2005101552A JP2005101552A (ja) | 2005-04-14 |
| JP2005101552A5 JP2005101552A5 (enExample) | 2007-08-16 |
| JP4619060B2 true JP4619060B2 (ja) | 2011-01-26 |
Family
ID=34466912
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2004235723A Expired - Fee Related JP4619060B2 (ja) | 2003-08-15 | 2004-08-13 | 半導体装置の作製方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP4619060B2 (enExample) |
Families Citing this family (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4785447B2 (ja) * | 2005-07-15 | 2011-10-05 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| JP2007027487A (ja) * | 2005-07-19 | 2007-02-01 | Dowa Holdings Co Ltd | 導電膜または配線の形成法 |
| JP2007095979A (ja) * | 2005-09-29 | 2007-04-12 | Clover Denshi Kogyo Kk | バンプ形成装置 |
| JP4961162B2 (ja) * | 2006-05-01 | 2012-06-27 | 有限会社 エスアイジェイテクノロジ | 電気接続体及びカートリッジ |
| JP5352967B2 (ja) * | 2006-11-17 | 2013-11-27 | 株式会社リコー | 多層配線構造の製造方法及び多層配線構造 |
| JP5101097B2 (ja) * | 2006-12-14 | 2012-12-19 | 株式会社リコー | 多層配線の作製方法及び多層配線並びに薄膜トランジスタ、アクティブマトリックス駆動回路及びフラットパネルディスプレイ |
| US7858513B2 (en) * | 2007-06-18 | 2010-12-28 | Organicid, Inc. | Fabrication of self-aligned via holes in polymer thin films |
| WO2009047854A1 (ja) * | 2007-10-11 | 2009-04-16 | Sij Technology, Inc. | 電気接続体、電気接続体の形成方法及びカートリッジ |
| FR2925222B1 (fr) * | 2007-12-17 | 2010-04-16 | Commissariat Energie Atomique | Procede de realisation d'une interconnexion electrique entre deux couches conductrices |
| JP2009239070A (ja) * | 2008-03-27 | 2009-10-15 | Fujifilm Corp | 配線形成方法 |
| US8343869B2 (en) * | 2008-06-24 | 2013-01-01 | Xjet Ltd. | Method for non-contact materials deposition |
| WO2011111507A1 (en) * | 2010-03-12 | 2011-09-15 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
| JP2011249452A (ja) * | 2010-05-25 | 2011-12-08 | Murata Mfg Co Ltd | 配線基板及び配線基板の製造方法 |
| WO2012002236A1 (en) * | 2010-06-29 | 2012-01-05 | Semiconductor Energy Laboratory Co., Ltd. | Wiring board, semiconductor device, and manufacturing methods thereof |
| JP2012190887A (ja) * | 2011-03-09 | 2012-10-04 | Murata Mfg Co Ltd | 電子部品 |
| JP6370077B2 (ja) * | 2014-03-25 | 2018-08-08 | 株式会社Fuji | 電子デバイスの製造方法及び製造装置 |
| US10026624B2 (en) * | 2014-12-19 | 2018-07-17 | Idemitsu Kosan Co., Ltd. | Conductor composition ink, laminated wiring member, semiconductor element and electronic device, and method for producing laminated wiring member |
| TW201724356A (zh) * | 2015-08-13 | 2017-07-01 | Idemitsu Kosan Co | 導體及其製造方法、及使用其之積層電路與積層佈線構件 |
| CN106502011A (zh) * | 2016-12-30 | 2017-03-15 | 深圳市华星光电技术有限公司 | 画素结构及工作方法、阵列基板 |
| WO2019186780A1 (ja) * | 2018-03-28 | 2019-10-03 | 株式会社Fuji | 回路形成方法、および回路形成装置 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03177073A (ja) * | 1989-12-05 | 1991-08-01 | Seiko Epson Corp | 薄膜トランジスタ |
| JP3457348B2 (ja) * | 1993-01-15 | 2003-10-14 | 株式会社東芝 | 半導体装置の製造方法 |
| JPH06296023A (ja) * | 1993-02-10 | 1994-10-21 | Semiconductor Energy Lab Co Ltd | 薄膜状半導体装置およびその作製方法 |
| JP4302194B2 (ja) * | 1997-04-25 | 2009-07-22 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| JP3980312B2 (ja) * | 2001-09-26 | 2007-09-26 | 株式会社日立製作所 | 液晶表示装置およびその製造方法 |
| JP4250893B2 (ja) * | 2001-12-21 | 2009-04-08 | セイコーエプソン株式会社 | 電子装置の製造方法 |
| JP2003280553A (ja) * | 2002-03-22 | 2003-10-02 | Sharp Corp | アクティブマトリクス基板 |
| JP4623986B2 (ja) * | 2003-03-26 | 2011-02-02 | 株式会社半導体エネルギー研究所 | 表示装置の作製方法 |
-
2004
- 2004-08-13 JP JP2004235723A patent/JP4619060B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2005101552A (ja) | 2005-04-14 |
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