JP4585327B2 - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
- Publication number
- JP4585327B2 JP4585327B2 JP2005031999A JP2005031999A JP4585327B2 JP 4585327 B2 JP4585327 B2 JP 4585327B2 JP 2005031999 A JP2005031999 A JP 2005031999A JP 2005031999 A JP2005031999 A JP 2005031999A JP 4585327 B2 JP4585327 B2 JP 4585327B2
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- JP
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- Prior art keywords
- semiconductor device
- bonding
- boundary
- region
- bonding pad
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
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- H—ELECTRICITY
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- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/32—Additional lead-in metallisation on a device or substrate, e.g. additional pads or pad portions, lines in the scribe line, sacrificed conductors
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
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- H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/02165—Reinforcing structures
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/039—Methods of manufacturing bonding areas involving a specific sequence of method steps
- H01L2224/0392—Methods of manufacturing bonding areas involving a specific sequence of method steps specifically adapted to include a probing step
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- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H01L24/42—Wire connectors; Manufacturing methods related thereto
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- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
- Semiconductor Integrated Circuits (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005031999A JP4585327B2 (ja) | 2005-02-08 | 2005-02-08 | 半導体装置およびその製造方法 |
| US11/342,527 US7294930B2 (en) | 2005-02-08 | 2006-01-31 | Semiconductor device and manufacturing process therefor |
| CNB2006100064634A CN100426497C (zh) | 2005-02-08 | 2006-02-08 | 半导体装置及其制造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005031999A JP4585327B2 (ja) | 2005-02-08 | 2005-02-08 | 半導体装置およびその製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2006222147A JP2006222147A (ja) | 2006-08-24 |
| JP2006222147A5 JP2006222147A5 (enExample) | 2007-12-27 |
| JP4585327B2 true JP4585327B2 (ja) | 2010-11-24 |
Family
ID=36911737
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005031999A Expired - Lifetime JP4585327B2 (ja) | 2005-02-08 | 2005-02-08 | 半導体装置およびその製造方法 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US7294930B2 (enExample) |
| JP (1) | JP4585327B2 (enExample) |
| CN (1) | CN100426497C (enExample) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5148825B2 (ja) * | 2005-10-14 | 2013-02-20 | ルネサスエレクトロニクス株式会社 | 半導体装置および半導体装置の製造方法 |
| JP4930322B2 (ja) * | 2006-11-10 | 2012-05-16 | ソニー株式会社 | 半導体発光素子、光ピックアップ装置および情報記録再生装置 |
| JP5027605B2 (ja) * | 2007-09-25 | 2012-09-19 | パナソニック株式会社 | 半導体装置 |
| JP5323406B2 (ja) * | 2008-06-24 | 2013-10-23 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置の製造方法 |
| JP5160498B2 (ja) * | 2009-05-20 | 2013-03-13 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| JP5318055B2 (ja) | 2010-09-22 | 2013-10-16 | 株式会社東芝 | 半導体装置、及び半導体装置の製造方法 |
| DE102011004106A1 (de) * | 2010-12-28 | 2012-06-28 | Robert Bosch Gmbh | Leiterplatte, Verfahren zum Herstellen einer Leiterplatte und Prüfvorrichtung zum Prüfen einer Leiterplatte |
| JP6348009B2 (ja) * | 2014-07-15 | 2018-06-27 | ラピスセミコンダクタ株式会社 | 半導体装置 |
| CN106783802A (zh) * | 2016-11-22 | 2017-05-31 | 上海华力微电子有限公司 | 一种芯片中特定电路测试用微型衬垫结构及其制作方法 |
| JP2021150307A (ja) * | 2020-03-16 | 2021-09-27 | ソニーセミコンダクタソリューションズ株式会社 | 半導体装置、半導体装置の製造方法、及び電子機器 |
| US12176320B2 (en) | 2021-05-10 | 2024-12-24 | Ap Memory Technology Corporation | Semiconductor structure and methods for bonding tested wafers and testing pre-bonded wafers |
| KR20240129161A (ko) * | 2021-11-19 | 2024-08-27 | 콜모르겐 코포레이션 | 솔더 접합 검사 기능부 |
| CN117199054A (zh) * | 2022-06-01 | 2023-12-08 | 长鑫存储技术有限公司 | 封装结构及其制作方法、半导体器件 |
| CN118099133A (zh) * | 2022-11-15 | 2024-05-28 | 长鑫存储技术有限公司 | 半导体结构 |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01129432A (ja) * | 1987-11-16 | 1989-05-22 | Nec Corp | 集積回路 |
| JPH04215450A (ja) * | 1990-12-14 | 1992-08-06 | Mitsubishi Electric Corp | 半導体集積回路装置 |
| JPH08115958A (ja) * | 1994-08-24 | 1996-05-07 | Nec Corp | 半導体装置 |
| JPH09213757A (ja) * | 1996-02-07 | 1997-08-15 | Kawasaki Steel Corp | ウエハプローブ容易化方法 |
| JP3843624B2 (ja) * | 1998-11-27 | 2006-11-08 | 松下電器産業株式会社 | 半導体集積回路装置及び半導体集積回路装置の組立方法 |
| KR100331553B1 (ko) * | 1999-09-16 | 2002-04-06 | 윤종용 | 여러번의 프로빙 및 안정된 본딩을 허용하는 패드를 갖는 집적회로 장치 |
| JP2001176876A (ja) * | 1999-12-17 | 2001-06-29 | Matsushita Electronics Industry Corp | 高耐圧半導体装置 |
| JP2001338955A (ja) * | 2000-05-29 | 2001-12-07 | Texas Instr Japan Ltd | 半導体装置及びその製造方法 |
| US6563226B2 (en) * | 2001-05-23 | 2003-05-13 | Motorola, Inc. | Bonding pad |
| US6844631B2 (en) * | 2002-03-13 | 2005-01-18 | Freescale Semiconductor, Inc. | Semiconductor device having a bond pad and method therefor |
| US6784556B2 (en) * | 2002-04-19 | 2004-08-31 | Kulicke & Soffa Investments, Inc. | Design of interconnection pads with separated probing and wire bonding regions |
| JP3724464B2 (ja) * | 2002-08-19 | 2005-12-07 | 株式会社デンソー | 半導体圧力センサ |
| US6765228B2 (en) * | 2002-10-11 | 2004-07-20 | Taiwan Semiconductor Maunfacturing Co., Ltd. | Bonding pad with separate bonding and probing areas |
| JP2006210631A (ja) * | 2005-01-28 | 2006-08-10 | Nec Electronics Corp | 半導体装置 |
-
2005
- 2005-02-08 JP JP2005031999A patent/JP4585327B2/ja not_active Expired - Lifetime
-
2006
- 2006-01-31 US US11/342,527 patent/US7294930B2/en active Active
- 2006-02-08 CN CNB2006100064634A patent/CN100426497C/zh active Active
Also Published As
| Publication number | Publication date |
|---|---|
| US7294930B2 (en) | 2007-11-13 |
| US20060186405A1 (en) | 2006-08-24 |
| JP2006222147A (ja) | 2006-08-24 |
| CN1819168A (zh) | 2006-08-16 |
| CN100426497C (zh) | 2008-10-15 |
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